Key research themes
1. What are the thermodynamic and physical limits governing different classes of random number generation methods?
This research theme focuses on analyzing the physical and thermodynamic costs associated with generating randomness across various approaches — including true random number generators (TRNGs), pseudorandom number generators (PRNGs), and random number generators (RNGs) given access to imperfect randomness sources. Understanding these energetic bounds is critical for designing efficient hardware-embedded random number generators and bridging abstract algorithmic randomness with physical implementation realities.
2. How can randomness be generated uniformly in non-numeric domains through mappings to numeric random number generation, and what are the implications for hardware implementations?
This line of investigation concerns the generation of random objects beyond simple numeric sequences - such as passwords, permutations, Latin squares, and CAPTCHAs. It aims to unify diverse random generation problems by encoding these objects numerically and leveraging random number generation methods. Also explored are novel hardware-centric designs, such as parallel linear feedback shift registers (LFSRs), enabling efficient realization of these mappings for uniform and high-quality random object generation.
3. What methodologies and metrics effectively assess the quality and security of various random number generators, particularly in cryptographic contexts?
Evaluating RNG quality is essential for ensuring the security and reliability of cryptographic systems and simulations. This research theme surveys statistical test suites, hardware evaluations, and standardizations by agencies like NIST and BSI. It covers approaches to detect biases, non-uniformity, predictability, and entropy strength, providing researchers concrete tools and standards to qualify RNGs for different applications, highlighting the differences in needs between cryptographic and simulation RNGs.


























![Figure 3.3: Flow Chart Explaining the Working of the Baseband Processor Frame format of incoming bits: The auto ID centre has proposed a new Electronic Product Code a the next standard for identifying product [4]. The electronic product code is a unique number tha identifies a specific item. The number is made up of header and 3 sets of data. EPC identifies the manufacturer, product, version and serial number, and uses an extra set of digits to identify unique items. Figure 4.6 shows EPC frame format. There are many formats for EPC and most of them consis of either 64 or 96 bits. The header identifies the EPC’s version number, allowing for different length or types of EPC. The EPC Manager Field is used to identify the manufacturer of the product. The Object Class field refers to the type of product, most often the stock keeping unit. The Serial Numbe field uniquely identifies a particular product.](https://figures.academia-assets.com/69384455/figure_004.jpg)



