25,686 questions
Best practices
0
votes
8
replies
101
views
How can I structure a C library project that uses Make with an examples subdirectory containing multiple examples?
I'm currently trying to sharpen my skills in C (as C++ is my "daily driver") by working on a small library project. The current project structure follows as described below:
project/
├─ bin/
...
3
votes
2
answers
183
views
How to make changes in a .tpp template implementation file trigger recompilation in a Makefile?
I'm using .tpp files to store template implementations.
However, modifying a .tpp file does not trigger recompilation, because Make does not generate an .o file from a .tpp source.
Still, these ...
- 422
Advice
0
votes
7
replies
157
views
Why people use "src" variables in make instead of just an "obj"?
I always created makefiles like this:
src = file1.c file2.c
obj = $(SRC:.c=.o)
and never really thought much about it, but now that I want to understand more about make, I do not really see why I use ...
0
votes
2
answers
46
views
How to add one independent makefile target as a dependency for another, with re-build if an option changes
I created a makefile with multiple targets, to be called from a different script. One of the targets depends on an option file. The option file depends on an empty FORCE target, and its recipe checks ...
- 3,166
1
vote
1
answer
52
views
Makefile for compiling all LaTeX files
I have a directory with a bunch of .tex files in various subdirectories. I want to compile them all with latexmk -pdf -pdflatex="pdflatex --shell-escape %O %S", with the generated files (...
- 117
Tooling
0
votes
1
replies
54
views
Using 'make' instead of ninja with ESP32 IDF?
I am aware that the default build system of the IDF is Ninja, but out of curiosity, is it supposed be possible to be built when I have cmake generate Makefiles for traditional make, 'out of the box' ? ...
- 1
Advice
0
votes
1
replies
60
views
How to define rules in CMakeList.txt?
Reading documentation and examples on add_custom_command - there is always a specific target name. But how do define a rule "to make a file of this type, take a file of that type and apply ...
- 1,556
0
votes
1
answer
67
views
How to check if Make has seen stale include directives during parsing?
Consider the following makefile:
bar.txt: foo.txt
echo "X := $(file <foo.txt)" >$@
include bar.txt
$(info X is $X)
This reads the contents of foo.txt, copies them into bar.txt ...
- 105k
Advice
0
votes
2
replies
76
views
G++ Not recognizing .bin file as input
I am making a program for a college class that takes a .bin file as input and eventually spits out a .txt file as output. For testing, I had to make a smaller program that does the reverse, which I ...
- 1
0
votes
1
answer
71
views
Why does wildcard not work in (the prerequisites of) a static pattern rule?
Consider this tree:
src/whatever/foo
Makefile
and this Makefile
out/bar : src/*/foo
@echo $^
# ----> OK, prints: src/whatever/foo
out/foo : out/% : src/*/%
@echo $^
# ----> ERR: ...
- 314
3
votes
1
answer
90
views
mingw32-make fails with Error 1 on Windows even though gcc works manually
I am beginner trying to compile a C project on Windows using mingw32-make, but I keep encountering an Error 1 during the linking/compiling stage. If I copy the exact same gcc command and run it ...
- 61
Best practices
0
votes
2
replies
41
views
What is the best practice for prerequisites in a Makefile with multiple levels of includes in source files?
I'm trying to write a Makefile from scratch that can compile LilyPond projects.
Based on an article in the Lilypond docs, I have a directory structure setup where, for example, pdf/piano.pdf is ...
- 369
0
votes
1
answer
50
views
Why does "make" insert a prefix folder into the middle of a stem, but not into the beginning?
What we have on my file system:
$ tree
.
├── deps
├── file2.c
├── Makefile
└── subfolder
└── file1.c
3 directories, 3 files
And I want to generate dependency files and to compile object files ...
- 3
1
vote
1
answer
85
views
How to idiomatically handle file inclusion in Makefile
I have 2 Makefiles present in different hierarchy levels, both of which include an other .mk file in them present in another directory. The included .mk file in turn includes another .mk file present ...
- 4,399
Best practices
0
votes
2
replies
22
views
Using Make with multiple configurations
I have decided to keep all the automation for my projects in Makefile and create a sub-directory structure environments with names of all the environments and setups I have. Sometimes I need to pickup ...
- 63
1
vote
2
answers
230
views
How to build the Apache Tomcat Native Library?
I updated my Apache Tomcat installation from 9.0.57 to 9.0.127 on Ubuntu 22.04 (in other words I removed the apt version and manually installed the updated version). Everything works fine, except that ...
- 77
1
vote
1
answer
156
views
Eclipse IDE highlights a correct C++ function with "Invalid arguments. Candidates are...'
I'm learning DearImgui, and after some trials making Eclipse not highlight std::cout an error, I have one last problem with it.
All functions from imgui_impl_glfw and imgui_impl_opengl3 are ...
- 77
3
votes
2
answers
156
views
-rpath-link=dir not able to locate the shared library
In the main project there are 3 shared library sub-projects and one binary project. The shared library libb.so depends on liba.so and shared library libd.so depends on libb.so and lastly the binary op ...
- 4,399
Best practices
1
vote
0
replies
196
views
In AOSP (14+), when overriding layouts via RROs, how to reference resources from target project?
I am trying to replace a layout from Car/SystemUI by creating a RRO with my new layout.
My new layout references a lot of resources such as colors, strings, drawables from the SystemUI project which ...
- 1
1
vote
2
answers
78
views
Is it incorrect/undefined behavior when libraries are linked using relative path?
I am building a shared library A which depends on another shared library B present in another directory dir2. When I link shared library B to A with relative path using -L../dir2 -lB it builds fine. ...
- 4,399
-2
votes
1
answer
61
views
Makefile error when .PHONY target doesn't contain the output file names
The Makefile below throws the following error when compiled.
Error:
make: *** No rule to make target 'libfoo.so.0.1', needed by 'all'. Stop.
Makefile:
LIBNAME = libfoo
SOLIBNAME = $(LIBNAME).so.0.1
...
- 4,399
0
votes
1
answer
132
views
Recipe throws error while compiling a target: "make: *** No rule to make target"
I have a Makefile which contains a target by name abc-def-ghi. When I compile this particular target in my Linux machine with the command make abc-def-ghi, it builds successfully, but when the same ...
- 4,399
1
vote
1
answer
76
views
ifdef with target-specific variables
This Makefile specifies a target-specific variable and a global one
VAR=value
target: VAR2=value2
ifdef VAR
VAR3+=$(VAR)
endif
ifdef VAR2
VAR3+=$(VAR2)
endif
target:
@echo $(VAR) $(VAR2)...
- 709
2
votes
1
answer
72
views
Gnu make 4.3 Makefile change output directory of dynamic target
I am trying to compile .c-files and store the output .o-files into different folders. When making a debug-build, the output files should be stored in build/debug/. When making a release-build, the ...
- 61
1
vote
2
answers
85
views
Conditional statement in makefile based on querying present working directory
From here, I realize it is possible to query the pwd.
I have the following 2 lines that I currently comment on/off
# LDLIBSOPTIONS=-L "/home/OpenXLSX/linux/lib"
LDLIBSOPTIONS=-L "/...
- 199
1
vote
1
answer
96
views
Using tee in a Linux makefile
I am trying to save the output of a makefile. I have tried everything that I can think of without success.
> >> tee compile.log
> 1> tee compile.log
> 2> tee compile.log
> &>...
user3859005
2
votes
3
answers
280
views
How to create test executables in Makefile in C?
I want to build make test with Makefile, and the test target should generate <file_name>_test executable based on the folder tests/<file_name>.c. All tests/*.c files have a main() function....
- 1,960
3
votes
2
answers
178
views
How to write Makefile for debugging only one header and source in c
The lib folder contains many *.h and *.c files, and all files are in development phrase and they contain many errors including syntax errors. So I want to write the Makefile to debug all libraries one ...
- 1,960
2
votes
2
answers
146
views
Nested C Makefile
C/Makefile relative newbie here. I have a C project whose structure looks like this:
main.c
subdir1
a.h
a.c
b.h
b.c
subdir2
x.h
x.c
y.h
...
- 673
0
votes
1
answer
87
views
Why doesn't make fail if a file exists but there is no rule for it
The following is a minimal example from something odd that was happening to me. My situation was obviously more complex than what follows, but the "misunderstanding" boils down exactly to ...
- 299
0
votes
1
answer
53
views
How to pass -B (rebuild all) to submake
I am using an alternate make system tied in to the main make. The issue is when I do:
make -B
For rebuild all, it does not pass that to the submake. I want the submake to also do a rebuild.
The only ...
- 11
0
votes
1
answer
83
views
mingw32-make application was unable to start correctly (0xC0000142)
I installed mingw64 on my Windows 11 system a few days ago.
When using mingw32-make, the following code (lines 27 and 28) in the makefile is failing.
voice.exe: ${OBJS}
${CC} -o "$@" ${...
- 396
0
votes
2
answers
74
views
How to apply the same recipe to different target with pattern?
Here is my Makefile. All the %.o depend on %.c and main.h, except the ones under main, event, cmd folder, which depend on $(MAIN_HEADERS).
How do I combine the below and make them simpler, as their ...
- 149
1
vote
1
answer
76
views
Pattern rules not recognized for files with double suffixes?
I have a minimal Makefile with just this one pattern rule:
%: %.m4
m4 $< > $@
Then, with GNU Make:
touch foo.in.m4 ; make foo.in executes as expected: m4 foo.in.m4 > foo.in
but for foo....
- 23
1
vote
1
answer
137
views
Makefile to create .o and program file in separate directories depending on architecture of host PC
Trying to create a Makefile that compiles C source into a .o file in a subfolder as well as creating the executable in a different subfolder depending on the architecture of the host PC. When I run &...
- 33
0
votes
1
answer
128
views
Undefined reference to header only library [duplicate]
Goal
Use concise makefile with organized directory structure. In particular, I don't want to have to edit the makefile to manage dependencies with every new source addition. The assumed directory ...
- 115
0
votes
0
answers
115
views
Can't build a project in Visual Studio Code when there are two build steps, cmake and make
Visual Studio Code 1.104.1, running on Fedora 42 (Workstation Edition). I can't seem to be able to build a project that requires two build steps, cmake and make. Part of the problem is that I want to ...
- 47
0
votes
1
answer
50
views
Why does my recursive Makefile target exit with ‘is up to date’ and no error, unless I redeclare all
I have a recursive Makefile setup where a root Makefile delegates builds to subdirectory Makefiles via $(MAKE) BUILDTARGET=.... Most subdirectories build fine, but the boot/ directory behaves ...
0
votes
1
answer
99
views
Makefile not building pattern rule prerequisites when it involves a chain [closed]
Consider this Makefile:
run-%: %
./$<
I have a test1.cpp file, so I expect make to build test1.o and test1 using chained implicit rules when I run make run-test1. However, what I get is
make: *...
- 386
4
votes
2
answers
166
views
What is the purpose of the ar “-l” option?
For context, I have been working on a game engine for a while now. The engine requires several libraries to function (Wayland, XKB, Vulkan, etc.). Because the added complexity of shared libraries ...
user28813012
1
vote
2
answers
81
views
Conditional declarations in makefile based on target
I'm modifying a makefile and a bit in the dark. I've tried googling and reading make primers but nothing has obvious answers to my problems below
Its first target: "default" compiles and ...
-4
votes
1
answer
62
views
I want `make` to fail if an environment var is not specified
I want GNU make command to fail if the environment var AUTO_CALL is not specified.
I could do so:
.PHONY: x
x:
ifndef AUTO_CALL
@echo "Don't call `make` manually."
else
...
endif
...
- 5,919
0
votes
1
answer
44
views
Building static version of Metakit C++ bindings on Debian
Metakit can be found here: https://github.com/jnorthrup/metakit
So, I'm trying to build Metakit on Debian. The readme file on GitHub have Unix (C++) build instructions. They are basically just the ...
- 575
2
votes
1
answer
65
views
GHC(Haskell) not picking up imports from makefile
I have been making a Haskell project that I want to continue on in C at some point through the FFI. I wanted to create a makefile to compile all the source with Clang for C and GHC for Haskell.
The ...
- 53
0
votes
1
answer
59
views
Variables depending on target variable not re-evaluated
I have a Makefile where I define a user-provided DEBUG variable to switch compile flags and target files. In one specific target, test, I want this variable to always be 1.
Essential bits:
DEBUG ?= 0
...
- 1,010
0
votes
1
answer
41
views
How to pass information between Makefile recipes
I want to build and push a docker image as two different recipes in a Makefile. However, to avoid installations on the environment, the version tag of the Dockerfile is created inside the container ...
- 483
0
votes
1
answer
75
views
Use variables as shell inputs in Makefile
How can I use the output of a shell script as variable in another shell script. Suppose the following Makefile
build:
DOCKER_IMAGE_ID=$(shell docker build -q -t myimage .); \
OUT=$(shell ...
- 483
0
votes
1
answer
124
views
Makefile "profiles" to define different flags for the build target
I'm trying to find a way to easily compile a project with debugging flags or with optimized flags. I.e. make debug would build the project with FLAGS = -static -W -Wall -Wextra -g -ggdb and make ...
- 267
0
votes
1
answer
106
views
makefile calls a shell script but it doesn't recognize the first argument passed
I have the following script and makefile:
Makefile
WORKING_DIR := /home/user1/working_dir
outdir := /home/user1/working_dir/outdir
script := ./myscript.sh
my_target: file1.ini file2.ini file3.ini ...
- 13
0
votes
1
answer
489
views
How do I compile with gcc using SDL2 on Windows with a Makefile?
I was for a while developing an SDL project in code blocks but wanted to transition to instead using VS Code. My experience with compiling my own programs hasn't gone beyond single file, non-dependent ...
- 133