907 questions
3
votes
2
answers
231
views
Force the C compiler to read the object's memory
I duplicated the topic because (possibly) I made a mistake with the section of the site and initially posted in the wrong place: Ways to reliably read an object in C
I have a regular byte buffer ...
- 509
0
votes
0
answers
60
views
AXI DMA Linux Driver on ZynqMP
I have a ZynqMP board with 4GB of PS RAM and 2GB of PL RAM. I have to write stream data to PL RAM using the AXI DMA s2mm channel and transmit it through 1G Ethernet. I've done this in a bare metal ...
0
votes
0
answers
67
views
ADC DMA does not work after wake up STM32
I am facing the issue that ADC DMA cannot work even I try re-init in many ways.
Information:
STM32L476
Stop mode and wake up via RTC
Can re-init USB so the terminal still works
Clock configuration ...
2
votes
0
answers
111
views
Zephyr with NXP S32k344 UART DMA [closed]
I struggle with correct settings for LPUART14 DMA.
My current settings in DTS for LPUART14 is:
dmas=<&edma 20 46>, <&edma 21 47>
Where slot 46 is TX, 47 is RX.
Channel 20 means ...
- 1,732
0
votes
0
answers
77
views
STM32G4 DAC DMA Callbacks Not Firing (HAL_DAC_ConvCpltCallbackCh1 / HalfCplt)
I'm working with an STM32G431KBUx and trying to output a waveform via DAC1 using DMA and TIM6 as trigger (TRGO).
However, the DMA callbacks HAL_DAC_ConvCpltCallbackCh1 and ...
- 85
0
votes
0
answers
60
views
linux kernel: allocate huge buffer
In my kernel module, I have to allocate a huge buffer of 1GB.
This buffer has to be mapped to user space.
In user space I will read 1GB file into this buffer.
From this buffer, I have to initiate DMA ...
- 655
1
vote
0
answers
91
views
How does Linux DMA implement scatter-gather functionality for MEM_TO_MEM mode?
In the DMA engine API, I only see the dmaengine_prep_slave_sg() function supporting DMA scatter-gather functionality. However, when examining DMA drivers from different manufacturers, this function ...
1
vote
0
answers
124
views
mSGDMA interaction via linux-socfpga on Agilex 5
I am trying to use this DMA driver to transfer memory from a streaming device to SDRAM.
This is my design in Qsys/Platform designer:
The design streams a predictable pattern of 6x6x6x6x to SDRAM.
The ...
- 23
1
vote
1
answer
284
views
How can I update `devm_ioremap_nocache` based kernel module
I am trying to understand this linux DMA driver
I am compiling it for this kernel
On compilation, I am getting the error:
drivers/dma/msgdma/msgdma.c:342:25: error: implicit declaration of function ‘...
- 23
1
vote
1
answer
160
views
STM32 - DMA write to GPIO causing a transfer error
I've been scratching my head all day trying to work this one out. My MCU is an STM32C071KBU6.
I am using a DMA to write to the GPIOA->BSRR register to look at signal timing with a scope. However, ...
- 303
0
votes
0
answers
74
views
How to read/write Intel MSR: IO_LLC_WAYS
I'm investigating Intel DDIO performance. Follow the official website:(https://www.intel.com/content/www/us/en/developer/articles/technical/ddio-analysis-performance-monitoring.html)
2.2.1.5 IO LLC ...
- 87
0
votes
1
answer
94
views
For some reason, when allocating memory from user space linux, I have a problem with the write response in AXE Memory Mapped to PCI Express module
I have a PC as a root complex and Xilinx fpga device as an end point that writes via PCI Express to root complex RAM using DMA and a linux driver to it. I have a problem that I can't solve in any way. ...
- 1
0
votes
1
answer
79
views
Does DMA play a role in process loading (from disk to memory)?
I’m trying to understand how operating systems load a program into memory from a hardware perspective.
I know that DMA (Direct Memory Access) is used for I/O operations, allowing data transfer between ...
- 1
0
votes
1
answer
65
views
Transfer data from RAM to Flash while ADC is running with DMA
I have a STM32WB55VG device where ADC Sampling for one channel is happening at a rate of 40 kHz. As the sampling duration is about 5 seconds the data (400 kBytes) can not be stored in RAM (only 256 ...
0
votes
0
answers
31
views
Missing paddr in struct drm_gem_dma_object
My driver was previously compiled with dma_gem_cma_helper.h using CMA-DMA in Kernel Ver-5.15.0-131. It seems that CMA either incomplete or something else in Kernel Ver-6.1.55. I am switching to DMA ...
0
votes
0
answers
77
views
DRM with CMA Helper
I have a driver compiled with Kernel/DRM CONFIG_DRM_GEM_CMA_HELPER=y on Kernel Ver-5.15.0.131. But on Kernel Ver-6.1.55, I cannot find CONFIG_DRM_GEM_CMA_HELPER. The file drm_gem_cma_helper.h is not ...
1
vote
1
answer
223
views
STM32 Shell: Why does DMA not callback (Key suspect)
I'm trying to integrate a shell into an STM32 project I'm working on. I used this library and followed a tutorial to get it working.
In the current implementation, the shell_get_char() function arms ...
- 229
1
vote
3
answers
148
views
Checking a char buffer from UART - what is the best practice? [closed]
Which of the following is better practice (or please suggest better alternatives) when using a global buffer with DMA with UART on an STM32 embedded application (no RTOS):
Option 1:
When entering the ...
- 55
1
vote
1
answer
191
views
I am getting DMA Transfer error interrupt every time I try to send a byte through PC COM Port to STM32F446RE
I am trying register level programming for STM32F446RE Nucleo-64 board. I want to receive data through UART in circular mode using DMA. I am getting DMA Transfer error interrupt every time I try to ...
- 11
2
votes
1
answer
81
views
Problems controlling SK6812RGBW/Neopixel with STM32H7
I'm trying to control a strip of 9 SK6812RGBW LED's with an STM32H757XIH6 microcontroller. I've been through a couple of tutorials on how to use DMA to control the PWM, and I've gone with this ...
- 65
1
vote
2
answers
102
views
STM32F427 controlling TIM4 channels (PWM) with signle DMA stream
I am trying to control all 4 TIM4 pins for PWM signal using DMA. Can I send data to each pin with single DMA stream ?
When I setup the pins and DMA in STM32 IDE it links the TIM4 Channel 1 pin to DMA1 ...
- 13
0
votes
1
answer
167
views
STM32F4 : Send/receive data to MCP25xxFD using SPI with DMA
I am interfacing the can_fd controller MCP2517FD with the STM32F4 (Cortex-M) using the SPI HAL library.
using the controller driver :https://github.com/SDibla/Cortex-M4-MCP2517FD_Driver
In blocking ...
- 1
0
votes
0
answers
34
views
How does QEMU's Virtio-Sound driver signal completion of PCM frame transmission when using non-blocking methods?
I'm working with a Virtio-Sound device in QEMU and need to use a non-blocking method for transferring PCM frames. I am using the following non-blocking method for sound transmission, but I'm unsure ...
- 13
0
votes
1
answer
199
views
Is there any common PCIe DMA memcpy function in Linux
I meet the same problem with this guy
Memcpy from PCIe memory takes more time than memcpy to PCIe memory
Yes, MMIO read is very slow at x86/x86-64, only create/send the 32 or 64 bits of TLP payload ...
- 21
1
vote
0
answers
94
views
The length of all sg in sg_table after dma_map_sg is less than request?
I try to alloc 16G system memory by vm_mmap and get_user_pages_fast, and pass the memory to dma_map_sg, But the length of all sg after dma_map_sg is less than 16G, it will equal when i disable iommu. ...
- 11
0
votes
0
answers
54
views
Finished DMA doesn't call PulseFinishedCallback when using FreeRTOS
I am trying to send data to PWM through DMA just once. It works fine in normal superloop, but when I'm using FreeRTOS the DMA doesn't call HAL_TIM_PWM_PulseFinishedCallback
HAL_TIM_PWM_Start_DMA(&...
- 13
1
vote
1
answer
127
views
ESP32: no signal on the DAC output - for the Continuous Wave Output mode (Continuous/DMA Mode)
I want to generate two signals on the DAC outputs of ESP32, the sine and cosine ones. But I have no signal on the DAC outputs.
Please, do not offer answers for the Cosine Wave Output mode (Cosine Mode)...
- 561
0
votes
1
answer
128
views
STM32C031C6 - FLASH Overflow Error During FFT Implementation with ARM CMSIS-DSP
I am working on an embedded project with the STM32C031C6 microcontroller using STM32CubeIDE. My goal is to perform an FFT on ADC input data and transmit the results over UART. I am utilizing the ARM ...
- 11
1
vote
1
answer
1k
views
identifier "ImGui_ImplWin32_WndProcHandler" is undefined and not found
#include <pch.h>
#include <dwmapi.h>
#include "imgui/imgui.h"
#include "imgui/imgui_impl_dx9.h"
#include <chrono>
#include <thread>
#include "settings....
0
votes
0
answers
196
views
How to allocate multiple reserved memories through DMA API
I need to reserve around 3 or 4 memory regions that are used by a single device driver.
I followed the guide from Xilinx. which works for a single memory region.
The Device tree looks like this:
...
- 1
0
votes
0
answers
77
views
DAC and DMA Not Outputting on PA4 on STM32L432KC
(my code is below)
I am trying to output an analog wave out of PA4 on the STM32L4 MCU, using DMA and a DAC. Ultimately, I will pass in audio data into the MCU through I2S and use DMA and the DAC to ...
0
votes
0
answers
35
views
ADC read with NUCLEO-C031C6 Kit
When ı try to read ADC values with this MCU, ıt does not give me 0 adc value when ı make ground a channel pin. It gives me 120 ADC (/4095) and ı did not get the reason.
- 21
0
votes
2
answers
223
views
NUCLEO F401RE and multiple reading with HAL_I2C_Mem_Read_DMA
I'm doing a project involving STM32 and an accelerometer sensor (LIS2DE)
I have to read every second the register from the sensor and send it via UART to arduino IDE but, idk why, the other two ...
- 3
0
votes
1
answer
87
views
PWM configured via DMA does not work properly at high speeds
I have set RCC on STM32F767ZI to 48 MHz (when setting to a higher frequency an error occurs, although in CubeMX with the same settings there is no error).
rcc.cr.modify(|_, w| w.hsebyp().set_bit())...
0
votes
1
answer
95
views
How to control duty cycle via DMA on Rust?
I wrote my code based on this topic, but it is not work. I'm using the stm32f7xx_hal crate, but I think the logic of my program is similar to the code from the example. My problem is that the duty ...
1
vote
1
answer
127
views
STM32 Nucleo F303RE: USART1 DMA not receiving data from GY-25 sensor
I'm working on a project with the STM32 Nucleo F303RE, and I'm using USART1 to receive data from a GY-25 sensor at 9600 bps using DMA. However, I'm not receiving any data through the DMA callback. I’...
- 49
1
vote
0
answers
102
views
Linux Kernel Module: how to allocate a buffer (meant to be used by mmap) with kzalloc and GFP_DMA?
Linux Kernel Module: how to allocate a buffer (meant to be used by mmap) with kzalloc and GFP_DMA?
On kzalloc, the doc is skinny: https://www.kernel.org/doc/html/v5.0/core-api/mm-api.html#c.kzalloc.
I ...
- 599
0
votes
1
answer
141
views
How RDMA map remote memory into local virtual memory?
I am new to RDMA and have just started looking into OPENSHMEM and UCP. I saw that both of them allow mapping remote memory region into local virtual memory space and access it using regular load and ...
0
votes
1
answer
140
views
When using RDMA to access memory on another machine, does it incur memory bandwidth overhead on both side?
Assuming that Machine-1 accesses data in the memory of Machine-2 via RDMA, will this action incur memory bandwidth overhead on both Machine-1 and Machine-2?
If a regular network card is used for data ...
- 819
1
vote
1
answer
164
views
DMA to GPIO control using timer is not working
I want to control GPIO output using DMA and Timer. The target is generating a CLK signal of 1MHz and control PB0 synchronized with the CLK.
I am using Nucleo-F411RE as the development board. I have ...
- 361
0
votes
1
answer
90
views
Is system call always involved in issuing a RDMA operation?
I read the following from ibverbs' website:
"InfiniBand host channel adapters (HCAs) and iWARP NICs commonly support direct hardware access from userspace (kernel bypass), and libibverbs supports ...
0
votes
2
answers
123
views
How does dpdk handle memory coherent in user space?
The DPDK will put received data into userspace buffers using DMA, so what's the DMA mapping used by DPDK? Is it coherent map or streaming map?
To my understanding, if use coherent map, then the read ...
- 675
0
votes
0
answers
54
views
While running a piece of driver code on an AMD64 machine, it appears that there are issues related to cache consistency or out-of-order execution
While running a piece of driver code on an AMD64 machine, it appears that there are issues related to cache consistency or out-of-order execution. Are there any experienced engineers who can help ...
- 23
2
votes
0
answers
77
views
Properly allocating a memory region and accessing the underlying hardware addresses
I am trying to interact with an IP hardware design, that is flashed on an FPGA matrix, from a Linux program. The communication takes place over the AXI bus. Character devices receive commands from ...
- 43
1
vote
2
answers
157
views
STM32F446 SPI DMA
I am using SPI1 DMA for sending data from STM32F446RET6 to Nokia5110 LCD. But it doesn't work. When I try without DMA, it works. Is my program wrong? Full program can be downloaded via the following ...
5
votes
2
answers
186
views
Confused about casting and order of operations
This is a very specific problem and I haven't heard back from the author, so I thought I would throw this out and see if my sanity is intact or not.
This is in regard to this video regarding DMA on a ...
1
vote
0
answers
132
views
HAL_UART_Transmit_DMA does not send data to serial port
I'm writing an MIDI application on STM32 (NUCLEO-F091RC). I basically have an implementation of midimerger: a program which receives from three different MIDI instruments and merge them into one ...
- 11
0
votes
0
answers
107
views
Data Missing in FIFO stream after DMA transfer
We have a DMA design with FIFO stream input.
We let FIFO accumulate the entirety of data stream i.e., 0x8001 depth and width is 32 bit.
Then we cut off the Input stream to FIFO since it is external.
...
- 21
0
votes
1
answer
414
views
DMA Read is working but DMA write is failing
We are developing a Linux host PCIe driver for an external PCIe card(device) to perform DMA operations. DMA controller is present on the PCIe board. We need to pass the DMA address to the board via ...
2
votes
1
answer
219
views
How OpenCL set up the memory buffer between the Integrated dev and CPU cores?
The external device usually has their own separate memory, which requires the DMA memory region between the device and CPU to copy data from/to system DRAM to devices's internal DRAM.
Therefore, I ...
- 1,477