JP2008147857A - High efficiency amplifier - Google Patents

Abstract

A high-efficiency amplifier capable of controlling a bias expected in advance and suppressing a decrease in efficiency and occurrence of distortion is obtained.
Envelope signal extraction means for extracting an envelope signal corresponding to an RF input signal, and voltage control for amplifying the RF input signal based on the extracted envelope signal and generating a voltage control signal The high-efficiency amplifier including the amplifier 400 and the amplifier 102 that amplifies the RF input signal in accordance with the voltage control signal has the extracted envelope signal as an input, and the waveform of the envelope signal is the true envelope of the RF input signal The voltage controller 400 further includes waveform shaping means 300 that performs waveform shaping based on predetermined input / output characteristics so as to obtain a waveform equivalent to a line, and generates an output signal after waveform shaping. Based on the subsequent output signal, a voltage control signal for dynamically controlling the bias is generated to control the amplifier 102.
[Selection] Figure 1

Description

  The present invention relates to a communication amplifier, and more particularly to a high-efficiency amplifier that suppresses generation of distortion and achieves high efficiency.

  In recent years, a Doherty amplifier has been proposed to increase the efficiency of a communication amplifier (see, for example, Patent Document 1). The prior art in this Patent Document 1 detects the voltage across a resistor provided in a drain voltage supply circuit of a carrier amplifier to extract an envelope voltage, and according to this envelope voltage level, the gates of the carrier amplifier and the peak amplifier High efficiency is achieved by controlling the voltage.

Special Table 2000-513535

However, this conventional technique has the following problems.
Doherty amplifiers are intended for high efficiency operation and inevitably carrier amplifiers are used with class AB or class B bias. At this time, the envelope extracted from the drain voltage supply circuit of the carrier amplifier does not faithfully reproduce the envelope of the RF signal input to the amplifier, and the envelope extracted from the drain voltage supply circuit of the carrier amplifier is There is a problem of distortion.

  FIG. 14 is an explanatory diagram showing how the envelope extracted in the conventional amplifier is distorted. More specifically, the characteristics of the input power versus drain current characteristics of the carrier amplifier are schematically shown, and the basic axis is a linear scale for both the vertical axis and the horizontal axis. When the input power vs. drain current characteristic has a relationship of a characteristic curve 801, when the input power waveform 802 is input to the carrier amplifier, a current characteristic 803 is obtained.

  By extracting this current characteristic 803 from the resistance end provided in the drain voltage supply circuit of the carrier amplifier, an envelope can be obtained. However, as shown in the characteristics 803a and 803b which are parts of the current characteristics 803, the extracted envelope is distorted.

  Similarly, in FIG. 1 of Patent Document 1, when the detector is configured using a device having nonlinear characteristics such as a diode, the waveform is distorted due to the square characteristics of the diode, thereby obtaining a dynamic range of the input signal. There is a problem that can not be.

  Due to these problems, there is a problem that even if the control shown in FIGS. 5A and 5B of Patent Document 1 is applied to the carrier amplifier and the peak amplifier, there is a problem that the operation is not expected, and efficiency is lowered or distortion is generated. This means that the envelope for generating the control signal needs to be undistorted, and it is necessary to extract an envelope faithful to the modulated wave signal from the drain voltage supply circuit. .

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a high-efficiency amplifier that can control a bias that is expected in advance, and that suppresses a decrease in efficiency and distortion.

  A high-efficiency amplifier according to the present invention generates an envelope signal extraction unit that extracts an envelope signal corresponding to an RF input signal, amplifies the RF input signal based on the extracted envelope signal, and generates a voltage control signal A high-efficiency amplifier having a voltage controller for amplification and an amplifier that amplifies the RF input signal in accordance with the voltage control signal. The extracted envelope signal is input and the waveform of the envelope signal is the true value of the RF input signal. The waveform controller further includes waveform shaping means for performing waveform shaping based on predetermined input / output characteristics so as to obtain a waveform equivalent to the envelope of the waveform, and generating an output signal after waveform shaping. Based on the output signal after the waveform shaping by the means, a voltage control signal for dynamically controlling the bias is generated to control the amplifier.

  According to the present invention, an input signal envelope can be reproduced by applying waveform shaping to a distorted envelope signal extracted corresponding to an RF input signal, and the reproduced input signal envelope is reproduced. By controlling the bias of the amplifier using a line, it is possible to control the bias expected in advance, and it is possible to obtain a high-efficiency amplifier with reduced efficiency and distortion.

  Hereinafter, preferred embodiments of the high efficiency amplifier of the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
FIG. 1 is a configuration diagram of a high-efficiency amplifier according to Embodiment 1 of the present invention. This high-efficiency amplifier includes a voltage extraction unit 200, a waveform shaping unit 300, and a voltage controller 400, as well as a Doherty amplifier including a carrier amplifier 101, a peak amplifier 102, a power distributor 103, and a power combiner 104. Here, the voltage extracting means 200 corresponds to an envelope signal extracting means.

First, the connection configuration will be described.
The power distributor 103 is connected to the inputs of the carrier amplifier 101 and the peak amplifier 102. The carrier amplifier 101 is supplied with a drain voltage Vd via a drain feed line, and a voltage extracting means 200 is inserted in the drain feed line. Then, the output of the voltage extraction unit 200 is input to the waveform shaping unit 300.

  The output of the waveform shaping means 300 is input to the voltage controller 400. The output of the voltage controller 400 is connected to the gate voltage supply circuit of the peak amplifier 102. The output of the carrier amplifier 101 and the output of the peak amplifier 102 are connected to the power combiner 104.

Next, the operation of the high efficiency amplifier including the Doherty amplifier shown in FIG. 1 will be described.
The RF signal that is a signal input is distributed to the carrier amplifier 101 and the peak amplifier 102 by the power distributor 103.

  When an RF signal is input to the carrier amplifier 101, a current accompanying signal amplification is generated in the drain voltage supply circuit. On the other hand, the voltage extracting means 200 converts the current generated in the drain voltage supply circuit into an envelope signal by differentially amplifying the potential generated at both ends of the resistor having a minute resistance value.

  The envelope signal extracted by the voltage extraction unit 200 is input to the waveform shaping unit 300. The waveform shaping means 300 shapes the waveform of the input envelope. That is, the waveform shaping means 300 reproduces and outputs an envelope equivalent to the RF input signal.

  More specifically, the waveform shaping unit 300 receives the envelope signal extracted by the voltage extraction unit 200 as an input, and outputs such that the waveform of the envelope signal becomes a waveform equivalent to the true envelope of the RF input signal. Is obtained in a storage unit (not shown), and an output signal after waveform shaping is generated based on this input / output characteristic. The detailed configuration of the waveform shaping means 300 will be described later in Embodiments 3 to 5.

  The output signal after the waveform shaping by the waveform shaping means 300 is input to the voltage controller 400. The voltage controller 400 generates and outputs a control signal for dynamically controlling the gate voltage of the peak amplifier, for example. At this time, the output signal of the voltage controller 400 is input to the gate voltage supply circuit of the peak amplifier 102.

  As described above, according to the first embodiment, the envelope of the RF input signal can be reproduced by shaping the envelope of the RF output signal obtained from the drain voltage supply circuit of the carrier amplifier. As a result, by controlling the bias using the faithful modulated wave envelope as a reference signal, it is possible to perform a bias control that is expected in advance, and it is possible to obtain a high-efficiency amplifier with reduced efficiency and distortion.

Embodiment 2. FIG.
FIG. 2 is a configuration diagram of the high efficiency amplifier according to the second embodiment of the present invention. This high-efficiency amplifier is composed of a voltage extraction means 200, a waveform shaping means 300, and a voltage controller 400 together with a power amplifier including a preamplifier 111 and a postamplifier 112. Here, the voltage extracting means 200 corresponds to an envelope signal extracting means.

First, the connection configuration will be described.
The preamplifier 111 is supplied with a drain voltage Vd via a drain feed line, and a voltage extracting means 200 is inserted in the drain feed line. Then, the output of the voltage extraction unit 200 is input to the waveform shaping unit 300. The configurations of the voltage extracting means 200 and the waveform shaping means 300 are the same as those in the first embodiment.

  Further, the output of the waveform shaping means 300 is input to the voltage controller 400. The output of the voltage controller 400 is connected to the gate voltage supply circuit or the drain voltage supply circuit of the post-amplifier 112.

Next, the operation of the high efficiency amplifier including the power amplifier shown in FIG. 2 will be described.
When the RF signal is input, a current accompanying signal amplification is generated in the drain voltage supply circuit of the preamplifier 111. Here, the operations of the voltage extracting means 200 and the waveform shaping means 300 are the same as those in the first embodiment.

  Further, the output signal of the voltage controller 400 is input to the voltage supply circuit of the post-amplifier 112, and the bias of the post-amplifier 112 is dynamically controlled.

  As described above, according to the second embodiment, the envelope of the RF input signal can be reproduced by shaping the waveform of the RF output signal obtained from the drain voltage supply circuit of the preamplifier. As a result, by controlling the bias of the post-amplifier using the faithful modulation wave envelope as a reference signal, it is possible to control the bias expected in advance, and it is possible to obtain a high-efficiency amplifier with reduced efficiency and distortion. it can.

  Further, by having the voltage extraction means in the drain voltage supply circuit of the preamplifier, the power loss generated in the voltage extraction means is smaller than in the first embodiment, that is, the power loss in the entire system is reduced. Can be small.

Embodiment 3 FIG.
In the third embodiment, a case where a function generator is applied will be described as a specific example of the waveform shaping means 300. FIG. 3 is a diagram for explaining the processing of the function generator in the third embodiment of the present invention. In FIG. 3, the envelope waveform that is input is output as an envelope waveform so as to reproduce the RF input signal envelope by the function generator 310 that holds the function and characteristics for shaping.

  That is, the function generator 310 receives the envelope signal extracted by the voltage extraction means 200 as an input, and an output is obtained so that the waveform of the envelope signal becomes a waveform equivalent to the true envelope of the RF input signal. Further, by holding a predetermined input / output characteristic or function in a storage unit (not shown), an output signal after waveform shaping can be generated based on this input / output characteristic.

  As described above, according to the third embodiment, the envelope with the envelope distortion obtained from the current characteristic of the output current waveform is corrected by the waveform shaping by the function generator having a predetermined input / output characteristic or function. It becomes possible to make it equivalent to the envelope of the RF input signal waveform. As a result, by controlling the bias using the faithful modulated wave envelope as a reference signal, it is possible to perform a bias control that is expected in advance, and it is possible to obtain a high-efficiency amplifier with reduced efficiency and distortion.

Embodiment 4 FIG.
FIG. 4 is a configuration diagram of a function generator and an explanatory diagram of waveform shaping in the fourth embodiment of the present invention. The function generator 310 includes a diode, a resistor, and an operational amplifier that are nonlinear elements. In the configuration of FIG. 4, a desired function is approximated by determining circuit constants R1 to R6, Vb, and appropriate diodes D1 and D2 (for example, see “Amplifier Circuit Design”, Ikuo Okamura, CQ Publishing, 1973). ).

Next, the waveform shaping operation by the function generator 310 shown in FIG. 4 will be described.
For example, as shown in the waveform shaping explanatory diagram of FIG. 4, by defining circuit constants R1 to R6, Vb and appropriate diodes D1 and D2, an inverse characteristic waveform L3 is generated with respect to the input of the distortion waveform L1. As a result, the undistorted waveform characteristic L2 can be obtained as an output signal.

  As described above, according to the fourth embodiment, the distortion waveform characteristic at the time of a large signal is shaped by the inverse characteristic of the function generator and can be corrected to the distortion-free waveform characteristic. As a result, by controlling the bias using the faithful modulated wave envelope as a reference signal, it is possible to perform a bias control that is expected in advance, and it is possible to obtain a high-efficiency amplifier with reduced efficiency and distortion.

Embodiment 5. FIG.
FIG. 5 is a configuration diagram of the waveform shaping means and the voltage controller using the digital signal processing technique according to the fifth embodiment of the present invention. The circuit shown in FIG. 5 has the functions of the waveform shaping unit 300 and the voltage controller 400, and includes an A / D converter 321, a digital signal processing unit 322, and a D / A converter 323.

Next, the operation of the circuit shown in FIG. 5 will be described.
The A / D converter 321 takes in the envelope signal that is the output of the voltage extraction means 200 of FIG. 1 and quantizes it. The quantized signal is input to the digital signal processing means 322 and waveform shaping is performed. The RF signal envelope is reproduced by this waveform shaping. Using this envelope as a reference signal, a gate voltage control signal is further generated and output to the D / A converter 323.

  The digital signal processing means 322 can digitally correct an envelope with distortion by holding predetermined input / output characteristics or functions in advance as, for example, correction table data. Further, the digital signal processing means 322 can generate a gate voltage control signal from the corrected envelope signal, and can also have the function of the voltage controller 400.

  As described above, according to the fifth embodiment, both the function of the waveform shaping unit and the function of the voltage controller can be realized by using the digital signal processing unit. As a result, the waveform shaping circuit and the voltage control circuit can be integrated into one digital circuit, and an improvement effect can be given to efficiency and distortion.

Embodiment 6 FIG.
In the sixth embodiment, a specific configuration of the voltage extraction unit 200 in FIG. 1 or the voltage extraction unit 200 in FIG. 2 will be described. FIG. 6 is a configuration diagram of the voltage extracting means in the sixth embodiment of the present invention. The voltage extraction means 200 includes a low frequency decoupling unit 201, a voltage detection resistor 202, a harmonic reflection network unit 203, a voltage detection end 204, and a differential amplifier 205. Here, the low frequency decoupling unit 201 corresponds to a low frequency decoupling circuit, and the harmonic reflection network unit 203 corresponds to a harmonic reflection circuit.

Next, the operation of the voltage extraction unit 200 shown in FIG. 6 will be described.
The voltage detection resistor 202 converts the current generated in the drain voltage supply circuit of the carrier amplifier 101 in FIG. 1 into a voltage. The voltage detection end 204 is connected to both ends of the voltage detection resistor 202 and outputs an envelope voltage at potentials “Vdet +” and “Vdet−”. Further, the differential amplifier 205 converts this potential into a potential difference “Vdet +” − “Vdet−” and outputs it.

  Here, the low-frequency decoupling unit 201 is arranged to block a low-frequency signal from the power source and the FET end. The harmonic reflection network unit 203 is arranged to block the RF signal and the harmonics from the FET end which is an amplifier.

  As described above, according to the sixth embodiment, the voltage extraction unit includes the low-frequency decoupling circuit and the harmonic reflection circuit, so that unnecessary frequency components can be removed from the envelope waveform, and unnecessary frequency component removal is performed. The filter for can be reduced.

Embodiment 7 FIG.
In the seventh embodiment, a case where a voltage offset unit is further introduced to the voltage extracting unit will be described. FIG. 7 is a specific block diagram of the voltage offset means in the seventh embodiment of the present invention. The voltage extraction means 200a in FIG. 7 illustrates the case where the absolute voltage value is lowered using a transformer. Moreover, the voltage extraction means 200b in FIG. 7 illustrates the case where the absolute voltage is lowered using resistance voltage division. Furthermore, the voltage extraction means 200c in FIG. 7 illustrates the case where an offset voltage is applied to the power supply voltage of the operational amplifier.

Next, the operation of the voltage extracting means having such a voltage offset means will be described.
In any of the circuits shown in FIG. 7, the envelope signal can be obtained by lowering the absolute potentials “Vdet +” and “−Vdet” obtained at the voltage detection terminal 204 by the action of the voltage offset means.

  As described above, according to the seventh embodiment, for example, when the transistor of the carrier amplifier is an LDMOS transistor or a GaN transistor, the power supply voltage applied to the drain power supply unit is about several tens of volts, The obtained voltage value must be taken out from the absolute voltages “Vdet +” and “Vdet−” of the voltage detection terminal 204 at about several tens of volts. Therefore, even in such a case, by using the voltage offset circuit shown in FIG. 7, the absolute potential can be reduced, and the device connected to the voltage detection terminal 204 can be easily selected.

Embodiment 8 FIG.
In the eighth embodiment, a specific configuration of the voltage controller 400 in FIG. 1 will be described. FIG. 8 is a specific configuration diagram of voltage controller 400 in the eighth embodiment of the present invention. This circuit includes a comparator 401 that performs a switching operation.

  In addition to the switching means, the voltage controller 400 having such a comparator 401 can be applied to other means according to the purpose, for example, multi-value switching of three or more values, seamless and linear gate voltage application, seamless and envelope It is possible to select a control method to be applied as a gate voltage having a nonlinear characteristic that weights the line voltage value.

Next, a specific operation when such a voltage controller 400 controls the gate voltage will be described.
An ideal 2-WAY Doherty amplifier does not consume the peak amplifier current when the backoff amount from the saturated output is 6 dB or more.

  However, the current of the peak amplifier is consumed even at a point where the back-off amount is 6 dB or more depending on the characteristics of the transistor applied to the peak amplifier, the gate voltage value of the peak amplifier, and the input / output matching conditions of the peak amplifier. The output power of the peak amplifier with a back-off amount of 6 dB or more is very small compared to the output power of the carrier amplifier and cannot be used effectively. For this reason, the consumption current of the peak amplifier is directly linked to a decrease in efficiency of the Doherty amplifier.

  Therefore, it is necessary to reduce the current consumption of the peak amplifier in the small / medium signal region and improve the efficiency. For example, as in the conventional control shown in FIGS. 5A and 5B of Patent Document 1, when a certain gate voltage proportional to the input power is applied, an ideal class C operation with a steep rise is realized. I can't. That is, the peak amplifier consumes current near the switching point.

  In such a case, by applying switching control, the gate voltage of the peak amplifier can be switched ON / OFF to approach an ideal class C operation, and as a result, the current is reduced to the switching point. can do.

  FIG. 9 is an explanatory diagram of the operation of the comparator in the eighth embodiment of the present invention. When the output signal of the waveform shaping means 300 is input, the comparator 401 makes a low level determination when the envelope voltage 404 is smaller than the threshold voltage Vth with reference to the threshold voltage Vth, and determines a high level when it is larger. .

  Here, the low level determination means that a control signal for reducing the gate voltage of the peak amplifier 102 is output. On the other hand, the high level determination means that a control signal for raising the gate voltage of the peak amplifier 102 is output.

  An example of a method for determining the threshold voltage Vth will be described with reference to FIG. A maximum voltage value 405 corresponding to the maximum instantaneous power point of the envelope voltage 404 is grasped, and a switching voltage value 403 is obtained from a predetermined switching back-off amount 406. This switching voltage value 403 becomes the threshold voltage Vth of the comparator 401.

  If the comparator 401 is not capable of driving the gate voltage supply circuit of the peak amplifier 102, the output of the comparator 401 may be connected to a gate voltage driver having the ability to drive the gate voltage supply circuit.

  The operation when the gate voltage driver is connected will be described next. When the comparator 401 is employed as the gate voltage controller, the gate voltage driver performs a switching operation based on the low level determination and the high level determination output from the comparator 401.

  In the case of the low level determination, from the viewpoint of reducing the current consumption of the peak amplifier, a gate voltage value (Vg = Vlo) satisfying that it is sufficiently smaller than the pinch-off voltage and does not consume current when the Doherty amplifier back-off amount is 6 dB or more Is output.

  In the case of high level determination, an optimized gate voltage value (Vg = Vhi) is output by comparing the saturation power of the Doherty amplifier and the efficiency / distortion at the operating point. The relationship of the gate voltage Vg at this time is Vlo <Vhi, and the instantaneous saturation power of the Doherty amplifier matches the instantaneous saturation power of the Doherty amplifier when the gate voltage Vg of the peak amplifier is fixed to Vhi.

  The voltage controller 400 of FIG. 1 can select other means besides the switching means according to the purpose. The eighth embodiment shown in FIG. 8 is an example in which efficiency is prioritized. When priority is given to the linearity of the Doherty amplifier, the gate voltage of the peak amplifier 102 is multi-valued to three or more based on this modulation wave envelope voltage value, the gate voltage is applied seamlessly and linearly, or A control method may be employed in which nonlinear characteristics that are seamless and weighted with respect to the envelope voltage value are applied as the gate voltage.

  As described above, according to the eighth embodiment, it is possible to provide an improvement effect on efficiency and distortion by controlling the bias with the waveform obtained from the waveform shaping means. Furthermore, if switching means is used for bias control, the peak amplifier can achieve ON / OFF operation of the peak amplifier by approaching an ideal class C operation, and the current can be reduced to the switching point, which is higher than conventional control. It can be efficiency.

Embodiment 9 FIG.
In the ninth embodiment, a case where a Doherty amplifier is arranged as the post-amplifier 112 in the high efficiency amplifier of FIG. 2 in the second embodiment will be described. In this configuration, the voltage controller 400 is connected to a gate voltage supply circuit of a carrier amplifier or a peak amplifier.

Next, the operation of the high efficiency amplifier using the Doherty amplifier will be described.
For example, when a Doherty amplifier is connected to the gate voltage supply circuit on the peak amplifier side, the same operation as in the first embodiment is performed.

  As described above, according to the ninth embodiment, by using a Doherty amplifier as a post-amplifier, an RF output signal envelope obtained from the drain voltage supply circuit of the pre-amplifier is waveform-shaped, and the RF input signal The envelope can be regenerated. As a result, the bias can be controlled using the faithful modulation wave envelope as a reference signal.

Embodiment 10 FIG.
In the tenth embodiment, a case where a Doherty amplifier is arranged as the post-amplifier 112 in the high efficiency amplifier of FIG. In the configuration of the tenth embodiment, voltage controller 400 is connected to a drain voltage supply circuit of a carrier amplifier or a peak amplifier.

Next, the operation of the high efficiency amplifier using the Doherty amplifier will be described.
In the tenth embodiment, the drain voltage of the post-amplifier 112 is controlled in the same manner as in the first embodiment.

  As described above, according to the tenth embodiment, the envelope of the RF output signal obtained from the drain voltage supply circuit of the preamplifier is shaped by using the Doherty amplifier as the postamplifier, and the RF input signal The envelope can be regenerated. As a result, it is possible to control the bias using a faithful modulated wave envelope as a reference signal.

Embodiment 11 FIG.
In the eleventh embodiment, a case will be described in which a single amplifier constituted by one transistor is arranged as the post-amplifier 112 in the high efficiency amplifier of FIG. 2 in the second embodiment. In this configuration, the voltage controller 400 is connected to a drain voltage supply circuit of a single amplifier.

Next, the operation of a high efficiency amplifier using a single amplifier will be described.
In the eleventh embodiment, the drain voltage of the post-amplifier 112 is controlled in the same manner as in the first embodiment.

  As described above, according to the eleventh embodiment, by using a single amplifier as a post-amplifier, the envelope of the RF output signal obtained from the drain voltage supply circuit of the pre-amplifier 111 is waveform-shaped, and the RF input The envelope of the signal can be reproduced. As a result, it is possible to control the bias using a faithful modulated wave envelope as a reference signal.

Embodiment 12 FIG.
In the twelfth embodiment, in the high efficiency amplifier of FIG. 1 in the previous first embodiment or in FIG. 2 in the previous second embodiment, the waveform shaping means 300 is added to the subsystem 500 that uses the input signal envelope. Furthermore, the case where it connects is demonstrated. FIG. 10 is a configuration diagram of a high-efficiency amplifier connected to the subsystem according to the twelfth embodiment of the present invention, and the waveform shaping means 300 is connected to the subsystem 500.

Next, the operation of the high efficiency amplifier connected to the subsystem 500 will be described.
An output signal of the waveform shaping unit 300 corresponding to the waveform shaping unit 300 is supplied to the subsystem 500. With such a connection configuration, when the subsystem 500 in the high-efficiency amplifier needs an output signal after waveform shaping, it can be supplied from the waveform shaping means 300.

  As described above, according to the twelfth embodiment, even when a subsystem that requires an output signal after waveform shaping is in the high efficiency amplifier, the output signal after waveform shaping is supplied from the waveform shaping means. Thus, the envelope of the input signal is reproduced. As a result, when the subsystem is connected to, for example, a power monitor, the power can be measured with high accuracy.

Embodiment 13 FIG.
FIG. 11 is a configuration diagram of the high efficiency amplifier according to the thirteenth embodiment of the present invention. This high efficiency amplifier includes a carrier amplifier 101, a peak amplifier 102, a power divider 103, a Doherty amplifier including a power combiner 104, voltage controllers 400a and 400b, a waveform shaping means 300, an input distribution means 600, and a detection circuit. 210. Here, the detection circuit 210 corresponds to an envelope signal extraction unit.

First, the connection configuration will be described.
Input distribution means 600 is connected to power distributor 103 and detection circuit 210. The detection circuit 210 is composed of, for example, a diode, a time constant circuit, a filter, and the like. The output of the detection circuit 210 is connected to the voltage controller 400a of the carrier amplifier 101 or the voltage controller 400b of the peak amplifier 102.

  The output of the voltage controller 400a is connected to the voltage supply circuit of the carrier amplifier 101. The output of the voltage controller 400b is connected to the voltage supply circuit of the carrier amplifier 101. The power distributor 103 is connected to the inputs of the carrier amplifier 101 and the peak amplifier 102. The output of the carrier amplifier 101 and the output of the peak amplifier 102 are connected to the power combiner 104.

Next, the operation of the high efficiency amplifier including the Doherty amplifier shown in FIG. 11 will be described.
An RF signal that is an input signal is distributed to the power distributor 103 and the detection circuit 210 by the input distributor 600.

  The detection circuit 210 extracts an envelope signal from the input RF signal, and the extracted envelope signal is input to the waveform shaping means 300. The waveform shaping means 300 shapes the waveform of the input envelope signal. That is, the waveform shaping means 300 reproduces and outputs an envelope equivalent to the RF input signal. As the waveform shaping means 300, for example, the circuit shown in FIG. 4 described in the fourth embodiment can be applied.

  The output signal of the waveform shaping means 300 is input to the voltage controller 400a of the carrier amplifier 101 and the voltage controller 400b of the peak amplifier 102. The voltage controllers 400a and 400b generate and output a control signal for dynamically controlling the bias. Further, the waveform shaping means 300, the voltage controller 400a, and the voltage controller 400b can apply a digital signal processing technique as in the circuit of FIG. 5 described in the fifth embodiment.

  The output signal of the voltage controller 400a is input to the voltage supply circuit of the carrier amplifier 101. The output signal of the voltage controller 400b is input to the voltage supply circuit of the peak amplifier 102. In FIG. 11, two voltage controllers 400a and 400b are used. However, it is also possible to configure a single voltage controller that combines them.

  As described above, according to the thirteenth embodiment, the envelope of the RF input signal can be reproduced by shaping the envelope obtained from the detection circuit. As a result, the bias of the Doherty amplifier can be controlled using the faithful modulation wave envelope as a reference signal.

Embodiment 14 FIG.
In the fourteenth embodiment, a case will be described in which the high-efficiency amplifier in FIG. FIG. 12 is a configuration diagram of the high efficiency amplifier according to the fourteenth embodiment of the present invention. This high-efficiency amplifier is composed of a delay adjustment means 700 together with a power amplifier including a preamplifier 111 and a postamplifier 112.

First, the connection configuration will be described.
This configuration is applied to the previous embodiment 2. The difference from the previous embodiment 2 is that the delay adjusting means 700 is inserted between the preamplifier 111 and the postamplifier 112. This is the point.

Next, the operation of the high efficiency amplifier shown in FIG. 12 will be described.
By inserting a delay adjusting unit 700 between the preamplifier 111 and the postamplifier 112 shown in FIG. 12, the delay time generated in the voltage extracting unit 200, the waveform shaping unit 300, and the voltage controller 400 of FIG. can do.

  As described above, according to the fourteenth embodiment, by inserting a delay adjustment circuit, the RF signal waveform and the voltage control signal applied to the post-amplifier are compared with those in the second embodiment. Highly accurate synchronization can be ensured.

Embodiment 15 FIG.
In the fifteenth embodiment, a case will be described in which the high efficiency amplifier of FIG. 11 in the previous thirteenth embodiment is further provided with delay adjusting means. FIG. 13 is a configuration diagram of the high efficiency amplifier according to the fifteenth embodiment of the present invention. This high-efficiency amplifier is different from FIG. 11 in that a delay adjusting means 700 a is further provided between the input distribution means 600 and the power distributor 103.

  Instead of this delay adjusting means 700a, it is also possible to adopt a configuration in which delay adjusting means 700b is inserted between power distributor 103 and carrier amplifier 101 and between power distributor 103 and peak amplifier 102. is there.

Next, the operation of the high efficiency amplifier shown in FIG. 13 will be described.
By inserting the delay adjusting means 700a or 700b shown in FIG. 13, the delay time generated in the waveform shaping means 300 and the voltage controllers 400a and 400b in FIG. 11 can be compensated.

  As described above, according to the fifteenth embodiment, by inserting a delay adjustment circuit, compared with the previous thirteenth embodiment, the RF signal waveform and the voltage control signal applied to the carrier amplifier and the peak amplifier. Highly accurate synchronization can be ensured between

It is a block diagram of the high efficiency amplifier in Embodiment 1 of this invention. It is a block diagram of the high efficiency amplifier in Embodiment 2 of this invention. It is a figure for demonstrating the process of the function generator in Embodiment 3 of this invention. It is a block diagram of the function generator in Embodiment 4 of this invention, and explanatory drawing of waveform shaping. It is a block diagram of the waveform shaping means and voltage controller using the digital signal processing technique in Embodiment 5 of this invention. It is a block diagram of the voltage extraction means in Embodiment 6 of this invention. It is a specific block diagram of the voltage offset means in Embodiment 7 of this invention. It is a specific block diagram of the voltage controller in Embodiment 8 of this invention. It is explanatory drawing of operation | movement of the comparator in Embodiment 8 of this invention. It is a block diagram of the high efficiency amplifier connected to the subsystem in Embodiment 12 of this invention. It is a block diagram of the high efficiency amplifier in Embodiment 13 of this invention. It is a block diagram of the high efficiency amplifier in Embodiment 14 of this invention. It is a block diagram of the high efficiency amplifier in Embodiment 15 of this invention. It is explanatory drawing which showed a mode that the envelope extracted in the conventional amplifier was distorted.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 101 Carrier amplifier, 102 Peak amplifier, 103 Power divider, 104 Power combiner, 111 Preamplifier, 112 Postamplifier, 200, 200a, 200b, 200c Voltage extraction means (envelope signal extraction means), 201 Low frequency decoupling Ring part (low frequency decoupling circuit), 202 voltage detection resistor, 203 harmonic reflection network part (harmonic reflection circuit), 204 voltage detection terminal, 205 differential amplifier, 210 detection circuit (envelope signal extraction means), 300 waveform shaping means, 310 function generator, 321 converter, 322 digital signal processing means, 323 converter, 400, 400a, 400b voltage controller, 401 comparator, 500 subsystem, 600 input distribution means, 700, 700a, 700b delay adjustment means.

Claims (14)

An envelope signal extracting means for extracting an envelope signal corresponding to the RF input signal;
A voltage controller for amplifying the RF input signal based on the extracted envelope signal and generating a voltage control signal;
A high efficiency amplifier comprising: an amplifier that amplifies the RF input signal in response to the voltage control signal;
Using the extracted envelope signal as an input, waveform shaping is performed based on predetermined input / output characteristics so that the waveform of the envelope signal is equivalent to the true envelope of the RF input signal , Further comprising waveform shaping means for generating an output signal after waveform shaping,
The voltage controller controls the amplifier by generating a voltage control signal for dynamically controlling a bias based on the output signal after the waveform shaping by the waveform shaping unit. amplifier. The high efficiency amplifier of claim 1.
The amplifier comprises a Doherty amplifier having a carrier amplifier and a peak amplifier,
The envelope signal extraction means has a voltage detection resistor inserted in a drain voltage supply circuit that applies a drain voltage to the carrier amplifier, and corresponds to the RF input signal from the voltage across the voltage detection resistor. Extract the envelope signal,
The voltage controller generates a voltage control signal for dynamically controlling a bias based on the output signal after the waveform shaping by the waveform shaping means, and controls the peak amplifier. Efficiency amplifier. The high efficiency amplifier of claim 2,
The voltage controller generates a voltage control signal for dynamically controlling a bias in accordance with a comparison result between the output signal after the waveform shaping by the waveform shaping unit and a predetermined threshold, and the peak amplifier A high efficiency amplifier characterized by controlling. The high efficiency amplifier of claim 1.
The amplifier comprises a power amplifier having a preamplifier and a postamplifier,
The envelope signal extraction means has a voltage detection resistor inserted in a drain voltage supply circuit that applies a drain voltage to the preamplifier, and corresponds to the RF input signal from the voltage at both ends of the voltage detection resistor. Extract the envelope signal
The voltage controller generates a voltage control signal for dynamically controlling a bias based on the output signal after the waveform shaping by the waveform shaping means, and controls the post-amplifier. High efficiency amplifier. The high efficiency amplifier according to claim 4.
A high-efficiency amplifier, further comprising delay adjusting means for compensating a delay time between the preamplifier and the postamplifier. The high efficiency amplifier according to claim 4 or 5,
The post-amplifier is composed of a Doherty amplifier having a carrier amplifier and a peak amplifier,
The high-efficiency amplifier, wherein the voltage controller is connected to a gate voltage supply circuit or a drain voltage supply circuit of the carrier amplifier or the peak amplifier in the Doherty amplifier, and controls the post-amplifier. The high efficiency amplifier according to claim 4 or 5,
The post-amplifier is an amplifier composed of one transistor,
The high-efficiency amplifier, wherein the voltage controller is connected to a gate voltage supply circuit or a drain voltage supply circuit of a post-amplifier and controls the post-amplifier. The high efficiency amplifier of claim 1.
Input distribution means for distributing the RF input signal to the amplifier and the envelope signal extraction means;
The amplifier comprises a Doherty amplifier having a carrier amplifier and a peak amplifier,
The envelope signal extraction means includes a detection circuit that detects an envelope signal corresponding to the RF input signal distributed by the input distribution means,
The voltage controller individually generates a voltage control signal for dynamically controlling a bias on the basis of the output signal after the waveform shaping by the waveform shaping unit, and controls each of the carrier amplifier and the peak amplifier. High-efficiency amplifier characterized by controlling. The high efficiency amplifier of claim 8,
Delay adjustment means for compensating for delay time between the power distributor and the carrier amplifier, between the power distributor and the peak amplifier, or between the input distribution means and the power distributor. A high-efficiency amplifier further comprising: The high efficiency amplifier according to any one of claims 1 to 9,
The high-efficiency amplifier, wherein the waveform shaping means comprises a function generator using an operational amplifier and a diode which is a nonlinear element. The high efficiency amplifier according to any one of claims 1 to 9,
As a configuration combining the waveform shaping means and the voltage controller,
An A / D converter that converts the envelope signal extracted by the envelope signal extraction means into a digital signal;
A digital signal processing means for generating a digital signal after waveform shaping based on the digital signal, and generating a voltage control digital signal for dynamically controlling a bias based on the digital signal after waveform shaping;
A high-efficiency amplifier comprising: a D / A converter that converts the voltage control digital signal into an analog signal to generate a voltage control signal. The high efficiency amplifier according to any one of claims 1 to 11,
The envelope signal extraction means has a low frequency decoupling circuit for blocking low frequency signals on the power supply side with respect to both ends of the voltage detection resistor inserted in the drain voltage supply circuit, A high-efficiency amplifier comprising a harmonic reflection circuit for blocking the RF input signal and harmonics on the amplifier side. The high efficiency amplifier according to any one of claims 1 to 12,
The high-efficiency amplifier, wherein the envelope signal extraction means further comprises voltage offset means for applying an offset voltage to the potential of the extracted envelope signal. The high efficiency amplifier according to any one of claims 1 to 13,
The waveform shaping means supplies the output signal after the waveform shaping to the subsystem when the subsystem in the high efficiency amplifier system requires the output signal after the waveform shaping. High efficiency amplifier.

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