FI923273A0 - Med dubbelminne foersett multiprocessorsystem. - Google Patents

Med dubbelminne foersett multiprocessorsystem.

Info

Publication number
FI923273A0
FI923273A0 FI923273A FI923273A FI923273A0 FI 923273 A0 FI923273 A0 FI 923273A0 FI 923273 A FI923273 A FI 923273A FI 923273 A FI923273 A FI 923273A FI 923273 A0 FI923273 A0 FI 923273A0
Authority
FI
Finland
Prior art keywords
multiprocessorsystem
foersett
medical double
medical
double
Prior art date
Application number
FI923273A
Other languages
English (en)
Other versions
FI923273A7 (fi
Inventor
Randall W Heugel
Richard Mussett
Original Assignee
Tandem Telecomm Syst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Telecomm Syst filed Critical Tandem Telecomm Syst
Publication of FI923273A0 publication Critical patent/FI923273A0/fi
Publication of FI923273A7 publication Critical patent/FI923273A7/fi

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2056—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring
    • G06F11/2087—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring with a common controller
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/40—Network security protocols

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Computer And Data Communications (AREA)
FI923273A 1991-07-18 1992-07-17 Med dubbelminne foersett multiprocessorsystem FI923273A7 (fi)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US73204091A 1991-07-18 1991-07-18

Publications (2)

Publication Number Publication Date
FI923273A0 true FI923273A0 (fi) 1992-07-17
FI923273A7 FI923273A7 (fi) 1993-01-19

Family

ID=24941949

Family Applications (1)

Application Number Title Priority Date Filing Date
FI923273A FI923273A7 (fi) 1991-07-18 1992-07-17 Med dubbelminne foersett multiprocessorsystem

Country Status (6)

Country Link
US (1) US5495570A (fi)
EP (1) EP0528538B1 (fi)
JP (1) JPH05242060A (fi)
DE (1) DE69227956T2 (fi)
FI (1) FI923273A7 (fi)
SE (1) SE9202182D0 (fi)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5619642A (en) * 1994-12-23 1997-04-08 Emc Corporation Fault tolerant memory system which utilizes data from a shadow memory device upon the detection of erroneous data in a main memory device
EP0721162A2 (en) * 1995-01-06 1996-07-10 Hewlett-Packard Company Mirrored memory dual controller disk storage system
US5758067A (en) * 1995-04-21 1998-05-26 Hewlett-Packard Co. Automated tape backup system and method
JPH0926892A (ja) * 1995-04-27 1997-01-28 Tandem Comput Inc 遠隔的に複製されかつ動的に再構成可能なメモリを有するコンピュータシステム
JP3590203B2 (ja) 1996-07-16 2004-11-17 株式会社東芝 記憶手段の制御方法及びその装置
US6049847A (en) * 1996-09-16 2000-04-11 Corollary, Inc. System and method for maintaining memory coherency in a computer system having multiple system buses
US5897656A (en) * 1996-09-16 1999-04-27 Corollary, Inc. System and method for maintaining memory coherency in a computer system having multiple system buses
US6006307A (en) * 1997-11-13 1999-12-21 Advanced Micro Devices, Inc. Computer system employing a mirrored memory system for providing prefetch bandwidth
US6185662B1 (en) * 1997-12-22 2001-02-06 Nortel Networks Corporation High availability asynchronous computer system
US6360281B1 (en) * 1998-05-29 2002-03-19 3Com Corporation System and method for communicating with a serial communications device using multiple virtual ports
US6253209B1 (en) * 1998-07-07 2001-06-26 International Business Machines Corporation Method for parallel, remote administration of mirrored and alternate volume groups in a distributed data processing system
GB2340627B (en) * 1998-08-13 2000-10-04 Plessey Telecomm Data processing system
JP2000231546A (ja) * 1999-02-12 2000-08-22 Univ Hiroshima 共有メモリ
US6341328B1 (en) * 1999-04-20 2002-01-22 Lucent Technologies, Inc. Method and apparatus for using multiple co-dependent DMA controllers to provide a single set of read and write commands
US6981176B2 (en) * 1999-05-10 2005-12-27 Delphi Technologies, Inc. Secured microcontroller architecture
WO2001016737A2 (en) * 1999-08-31 2001-03-08 Times N Systems, Inc. Cache-coherent shared-memory cluster
US6658589B1 (en) * 1999-12-20 2003-12-02 Emc Corporation System and method for backup a parallel server data storage system
US6615375B1 (en) 2000-02-03 2003-09-02 International Business Machines Corporation Method and apparatus for tolerating unrecoverable errors in a multi-processor data processing system
US7369838B1 (en) 2000-10-03 2008-05-06 At&T Corporation Intra-premises wireless broadband service using lumped and distributed wireless radiation from cable source input
US6785783B2 (en) * 2000-11-30 2004-08-31 International Business Machines Corporation NUMA system with redundant main memory architecture
US6708285B2 (en) 2001-03-15 2004-03-16 Hewlett-Packard Development Company, L.P. Redundant controller data storage system having system and method for handling controller resets
US6715101B2 (en) 2001-03-15 2004-03-30 Hewlett-Packard Development Company, L.P. Redundant controller data storage system having an on-line controller removal system and method
US6802023B2 (en) 2001-03-15 2004-10-05 Hewlett-Packard Development Company, L.P. Redundant controller data storage system having hot insertion system and method
US6773083B2 (en) 2001-08-29 2004-08-10 Lexmark International, Inc. Method and apparatus for non-volatile memory usage in an ink jet printer
US6938124B2 (en) * 2002-07-19 2005-08-30 Hewlett-Packard Development Company, L.P. Hardware assisted communication between processors
US7275181B2 (en) * 2003-03-26 2007-09-25 International Business Machines Corporation Autonomic embedded computing “dynamic storage subsystem morphing”
US7330930B1 (en) * 2004-03-09 2008-02-12 Adaptec, Inc. Method and apparatus for balanced disk access load distribution
US7384146B2 (en) * 2005-06-28 2008-06-10 Carestream Health, Inc. Health care kiosk having automated diagnostic eye examination and a fulfillment remedy based thereon
US7849369B2 (en) * 2005-10-25 2010-12-07 Waratek Pty Ltd. Failure resistant multiple computer system and method
US20080140805A1 (en) * 2006-10-05 2008-06-12 Holt John M Multiple network connections for multiple computers
WO2008040063A1 (en) * 2006-10-05 2008-04-10 Waratek Pty Limited Multi-path switching networks
US20080140633A1 (en) * 2006-10-05 2008-06-12 Holt John M Synchronization with partial memory replication
US20080133869A1 (en) * 2006-10-05 2008-06-05 Holt John M Redundant multiple computer architecture
US20080140801A1 (en) * 2006-10-05 2008-06-12 Holt John M Multiple computer system with dual mode redundancy architecture
US20080126506A1 (en) * 2006-10-05 2008-05-29 Holt John M Multiple computer system with redundancy architecture
US20100049268A1 (en) * 2007-02-20 2010-02-25 Avery Biomedical Devices, Inc. Master/slave processor configuration with fault recovery
US7644238B2 (en) 2007-06-01 2010-01-05 Microsoft Corporation Timestamp based transactional memory
WO2009153624A1 (en) * 2008-06-20 2009-12-23 Freescale Semiconductor, Inc. A system for distributing available memory resource
US8589737B2 (en) * 2008-06-20 2013-11-19 Freescale Semiconductor, Inc. Memory system with redundant data storage and error correction
US8131975B1 (en) 2008-07-07 2012-03-06 Ovics Matrix processor initialization systems and methods
US7958341B1 (en) 2008-07-07 2011-06-07 Ovics Processing stream instruction in IC of mesh connected matrix of processors containing pipeline coupled switch transferring messages over consecutive cycles from one link to another link or memory
US7870365B1 (en) 2008-07-07 2011-01-11 Ovics Matrix of processors with data stream instruction execution pipeline coupled to data switch linking to neighbor units by non-contentious command channel / data channel
US8145880B1 (en) 2008-07-07 2012-03-27 Ovics Matrix processor data switch routing systems and methods
US8327114B1 (en) 2008-07-07 2012-12-04 Ovics Matrix processor proxy systems and methods
EP2228944A1 (en) * 2009-03-09 2010-09-15 Alcatel Lucent Method and system for remote configuration of a device
FR3078439A1 (fr) * 2018-02-27 2019-08-30 Stmicroelectronics (Rousset) Sas Procede de gestion du routage de transactions entre des equipements sources, au moins un equipement cible, par exemple une memoire multiports, et systeme sur puce correspondant
CN108829631A (zh) * 2018-04-27 2018-11-16 江苏华存电子科技有限公司 一种提升多核处理器的信息管理方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT285689B (de) * 1968-03-29 1970-11-10 Siemens Ag Zentralgesteuerte Vermittlungsanlage der Fernmelde-, insbesondere Fernsprechtechnik
US3864670A (en) * 1970-09-30 1975-02-04 Yokogawa Electric Works Ltd Dual computer system with signal exchange system
US4228496A (en) * 1976-09-07 1980-10-14 Tandem Computers Incorporated Multiprocessor system
JPS59142799A (ja) * 1983-02-04 1984-08-16 Hitachi Ltd バツクアツプ用蓄電装置付二重化記憶装置
JP2886856B2 (ja) * 1986-04-09 1999-04-26 株式会社日立製作所 二重化バス接続方式
US4907231A (en) * 1987-05-06 1990-03-06 Fuji Photo Film Co., Ltd. Memory cartridge-connectable electronic device such as electronic still video camera
US4933838A (en) * 1987-06-03 1990-06-12 The Boeing Company Segmentable parallel bus for multiprocessor computer systems
US5204952A (en) * 1988-07-18 1993-04-20 Northern Telecom Limited Duplex processor arrangement for a switching system
JPH0814797B2 (ja) * 1988-11-14 1996-02-14 日本電気株式会社 二重化処理装置におけるチェック方法
US5237670A (en) * 1989-01-30 1993-08-17 Alantec, Inc. Method and apparatus for data transfer between source and destination modules
JPH02294723A (ja) * 1989-05-09 1990-12-05 Mitsubishi Electric Corp 補助記憶装置の２重化制御方法
JPH0317760A (ja) * 1989-06-14 1991-01-25 Mitsubishi Electric Corp データ書込み確認方式
US5185884A (en) * 1990-01-24 1993-02-09 International Business Machines Corporation Computer controlled optimized pairing of disk units
US5166936A (en) * 1990-07-20 1992-11-24 Compaq Computer Corporation Automatic hard disk bad sector remapping
US5157663A (en) * 1990-09-24 1992-10-20 Novell, Inc. Fault tolerant computer system

Also Published As

Publication number Publication date
US5495570A (en) 1996-02-27
FI923273A7 (fi) 1993-01-19
DE69227956T2 (de) 1999-06-10
EP0528538A2 (en) 1993-02-24
DE69227956D1 (de) 1999-02-04
EP0528538B1 (en) 1998-12-23
EP0528538A3 (en) 1994-05-18
SE9202182D0 (sv) 1992-07-16
JPH05242060A (ja) 1993-09-21

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Legal Events

Date Code Title Description
GB Transfer or assigment of application

Owner name: TANDEM COMPUTERS INCORPORATED