BoolVar v(*this, 0, 1);

switch (e.id) {

case OR_EXPR:

case AND_EXPR:

{

BoolVarArgs vs;

for (UnisonConstraintExpr e0 : e.children)

vs << adhoc_constraint_var(e0);

rel(*this, e.id == OR_EXPR ? BOT_OR : BOT_AND, vs, v, ipl);

}

return v;

case XOR_EXPR:

case IMPLIES_EXPR:

rel(*this,

adhoc_constraint_var(e.children[0]),

e.id == XOR_EXPR ? BOT_XOR : BOT_IMP,

adhoc_constraint_var(e.children[1]),

v,

ipl);

return v;

case NOT_EXPR:

rel(*this, adhoc_constraint_var(e.children[0]), IRT_NQ, v);

return v;

case ACTIVE_EXPR:

return a(e.data[0]);

case CONNECTS_EXPR:

return u(e.data[0], e.data[1]);

case IMPLEMENTS_EXPR:

return imp(e.data[0], e.data[1]);

case DISTANCE_EXPR:

return var(c(e.data[1]) >= (c(e.data[0]) + e.data[2]));

case SHARE_EXPR:

// This is fine because the temps of one will always be a prefix of the

// temps of the other

return var(y(e.data[0]) == y(e.data[1]));

case OPERAND_OVERLAP_EXPR:

return var((pls(e.data[0]) < ple(e.data[1])) &&

(pls(e.data[1]) < ple(e.data[0])));

case TEMPORARY_OVERLAP_EXPR:

return var((ls(e.data[0]) < le(e.data[1])) &&

(ls(e.data[1]) < le(e.data[0])));

case CALLER_SAVED_EXPR:

{

IntArgs cs(input->callersaved);

// TODO: this is correct, but should include temporaries wider than 1

dom(*this, r(e.data[0]), IntSet(cs), v);

}

return v;

case ALLOCATED_EXPR:

{

IntArgs cs(input->atoms[e.data[1]]);

dom(*this, ry(e.data[0]), IntSet(cs), v);

}

return v;

case ALIGNED_EXPR:

return var(ry(e.data[1]) == (ry(e.data[0]) + e.data[2]));

default:

GECODE_NEVER;

}

IntPropLevel ipl) {

int min = Gecode::Int::Limits::max,

max = Gecode::Int::Limits::min;

for (int i = 0; i < x.size(); i++) {

if (x[i].min() < min) min = x[i].min();

if (x[i].max() > max) max = x[i].max();

}

int upper_distance = abs(Gecode::Int::Limits::max - max),

lower_distance = abs(Gecode::Int::Limits::min - min);

assert(std::max(upper_distance, lower_distance) >= x.size());

bool upwards;

int step;

if (upper_distance > lower_distance) {

upwards = true;

step = 1;

} else {

upwards = false;

step = -1;

}

int id = upwards ? max + 1 : min - 1;

IntVarArgs cx;

for (int i = 0; i < x.size(); i++) {

IntVar cxi(*this, upwards ? x[i].min() : id, upwards ? id : x[i].max());

IntVar unique(*this, id, id);

ite(*this, m[i], x[i], unique, cxi, ipl);

cx << cxi;

id += step;

}

Gecode::distinct(home, cx, ipl);

for (unsigned int ii = 0; ii < input->instructions[o].size(); ii++) {

if (input->instructions[o][ii] == i0) return var(i(o) == ii);

}

GECODE_NEVER;

block b = input->pb[p];

IntVarArgs plss;

for (temporary t1 : input->temps[p])

plss << (t1 == NULL_TEMPORARY ? var(input->maxc[b]) : ls(t1));

return var(element(plss, y(p)));

IntVarArgs ples;

for (temporary t1 : input->temps[p])

ples << (t1 == NULL_TEMPORARY ? zero : le(t1));

return var(element(ples, y(p)));

int d = 0;

for (block b : input->B)

d += (input->freq[b] * input->maxc[b]);

assert(d >= 0 && d <= Int::Limits::max);

return d;

register_atom fa = input->range[rs][0],

la = input->range[rs][1];

// TODO: domain propagation (based on the domain of the r variables) would

// discard many impossible allocations

return var((r(t) <= la) && (r(t) + input->width[t] > fa));

register_atom fa = input->range[rs][0],

la = input->range[rs][1];

return var((r(t) >= fa) && (r(t) + input->width[t] <= la));

if (input->temps[p].size() == 1 ||

(input->temps[p].size() == 2 && !must_connect(p)))

return false;

else

return true;

for (operand p : input->operands[o])

if (input->use[p]) return p;

GECODE_NEVER;

for (operand p : input->operands[o])

if (!input->use[p]) return p;

GECODE_NEVER;

// Single-class operands do not transitively share any temporary

set<operand> sps(ps.begin(), ps.end());

for (unsigned int i = 0; i < ps.size(); i++)

for (unsigned int j = i + 1; j < ps.size(); j++) {

operand p = ps[i], q = ps[j];

if (!disjoint_sets(input->real_temps[p], input->real_temps[q]) ||

half_congruent(p, q)) {

sps.erase(p);

sps.erase(q);

}

}

return sps;

for (operand p1 : input->related_operands[p])

for (operand q1 : input->related_operands[q]) {

operation o1 = input->oper[p1], o2 = input->oper[q1];

if (o1 == o2)

if (input->type[o1] == LOW ||

input->type[o1] == HIGH ||

input->type[o1] == SPLIT2 ||

input->type[o1] == SPLIT4 ||

(input->type[o1] == COMBINE && input->use[p1] != input->use[q1]))

return true;

}

return false;

if (ps.size() < 2) return;

set<operand> sps = single_class(ps);

BoolVarArgs xs;

IntVarArgs rs;

for (operand p : sps) {

for (int w = 0; w < input->operand_width[p]; w++) {

xs << x(p);

// FIXME: "rs << var(ry(p) + w)" sometimes returns an unbounded variable

// during presolving!

IntVar rypw(*this, ry(p).min() + w, ry(p).max() + w);

constraint(rypw == ry(p) + w);

assert_bounded(rypw);

rs << rypw;

}

}

// Post global distinct for all single-class operands

distinct(*this, rs, xs, ipl);

// Post pair-wise disjoint constraints for all the other pairs

for (unsigned int i = 0; i < ps.size(); i++)

for (unsigned int j = i + 1; j < ps.size(); j++) {

operand p = ps[i], q = ps[j];

int wp = input->operand_width[p], wq = input->operand_width[q];

// Otherwise they are handled by distinct / nooverlap above

if (!(sps.count(p) && sps.count(q)))

// Otherwise they are allow to overlap

if (disjoint_sets(input->real_temps[p], input->real_temps[q]) &&

!half_congruent(p, q)) {

if (wp == wq) // Same size: enough with inequality

constraint((x(p) && x(q)) >> (ry(p) != ry(q)));

else // More general form of non-overlap

constraint((x(p) && x(q)) >>

((ry(p) >= ry(q) + wq) ^ (ry(q) >= ry(p) + wp)));

}

}

int Asize = range_size(A);

double max_likelihood = 0.0;

map<temporary, double> in_A;

int totalw = 0;

for (temporary t : input->tmp[b]) if (!is_dead(t)) {

int w = input->width[t];

IntVarRanges tregs(r(t));

Region r1;

RangeListIter tAtoms = extend(r1, tregs, w);

Inter<RangeListIter, RangeListIter> At(A, tAtoms);

double t_in_A = (double)range_size(At) / (double)range_size(tAtoms);

if (t_in_A > numeric_limits<double>::epsilon()) in_A[t] = t_in_A;

totalw += w;

}

// If the width of all temps is smaller than A then no saturation is possible

if (totalw < Asize) return 0.0;

map<int, vector<pair<int, double> > > events;

for (std::pair<const temporary, const double> tp : in_A) {

temporary t = tp.first;

events[ls(t).min()].push_back(make_pair(input->width[t], in_A[t]));

events[le(t).max()].push_back(make_pair(-input->width[t], in_A[t]));

}

// Total atoms that are surely allocated to A

double must_pressure = 0.0,

// Total atoms that may be allocated to A

may_pressure = 0.0,

// Total atoms possibly allocated to A weigthed by likelihood

weigthed_pressure = 0.0;

// For each event in C

for (auto step : events) {

int c = step.first;

if (c < C.first) continue;

else if (c > C.second) break;

for (pair<int, double> event : step.second) {

int w = event.first;

double t_in_A = event.second;

if (t_in_A >= 0.99) { // ts must be allocated to A

must_pressure += w;

weigthed_pressure += w;

if (must_pressure >= Asize) return 1.0;

} else { // ts may be allocated to A (lik. t_in_A)

may_pressure += w;

weigthed_pressure += t_in_A * w;

}

}

double cycle_likelihood;

if (must_pressure + may_pressure < Asize) cycle_likelihood = 0.0;

else {

cycle_likelihood = weigthed_pressure / (double)Asize;

if (cycle_likelihood > 0.99) return 1.0;

}

if (cycle_likelihood > max_likelihood) max_likelihood = cycle_likelihood;

}

return max_likelihood;

double in_pressure = 0.0, out_pressure = 0.0;

for (unsigned pi = 0; pi < input->operands[o].size(); pi++) {

operand p = input->operands[o][pi];

double maxp = 0.0;

for (IntVarValues ii(i(o)); ii(); ++ii) {

register_class rc = input->rclass[o][ii.val()][pi];

double pr = pressure(p, rc);

if (p > maxp) maxp = pr;

}

if (input->use[p])

in_pressure += maxp;

else

out_pressure += maxp;

}

return in_pressure - out_pressure;

pair<int,int> C = make_pair(0, c(input->out[b]).max());

// TODO: there should be a better way

Singleton rsA(fa, la);

Region r1;

NaryUnion A(r1, &rsA, 1);

return (saturation_likelihood(b, C, A) > 0.01);

int unit = 0, maxcon = 0;

for (operation o : is)

for (instruction i : input->instructions[o]) {

int con = input->con[i][r];

unit = gcd(unit, con);

maxcon += con;

}

return IntArgs::create(maxcon / unit + 1, 0, unit);

input(p_input),

options(p_options),

ipl(p_ipl),

n_int_vars(0),

n_bool_vars(0),

n_set_vars(0),

zero(*this, 0, 0),

IntLexMinimizeSpace(m),

input(m.input),

options(m.options),

ipl(m.ipl)

{

v_r.update(*this, m.v_r);

v_i.update(*this, m.v_i);

v_c.update(*this, m.v_c);

v_y.update(*this, m.v_y);

v_x.update(*this, m.v_x);

v_ry.update(*this, m.v_ry);

v_a.update(*this, m.v_a);

v_ls.update(*this, m.v_ls);

v_ld.update(*this, m.v_ld);

v_le.update(*this, m.v_le);

v_al.update(*this, m.v_al);

v_u.update(*this, m.v_u);

v_us.update(*this, m.v_us);

v_lt.update(*this, m.v_lt);

v_lat.update(*this, m.v_lat);

v_p.update(*this, m.v_p);

v_users.update(*this, m.v_users);

v_s.update(*this, m.v_s);

zero.update(*this, m.zero);

one.update(*this, m.one);

post_instruction_domains(b);

post_issue_cycle_domains(b);

post_temporary_domains(b);

for (operation o : input->ops[b]) {

unsigned int ops = input->instructions[o].size();

constraint(i(o) < ops);

}

int bmaxc = input->maxc[b];

for (operation o : input->ops[b]) {

constraint(c(o) <= bmaxc);

constraint(c(o) <= c(input->out[b]));

}

for (temporary t : input->tmp[b]) {

constraint(ls(t) <= bmaxc);

constraint(le(t) <= (bmaxc + input->minlive[t]));

}

// in-delimiters always start in cycle 0

constraint(c(input->in[b]) == 0);

// the rest of operations start at least in cycle 1

for (operation o : input->ops[b])

if (o != input->in[b]) constraint(c(o) >= 1);

for (operation o : input->ops[b])

for (operand p : input->operands[o]) {

int max = input->temps[p].size();

constraint(y(p) < max);

}

post_operand_register_definition(b);

post_live_start_definition(b);

post_live_duration_definition(b);

post_live_end_definition(b);

post_connected_operand_definition(b);

post_allocation_definition(b);

post_use_temporary_definition(b);

post_temporary_uses_definition(b);

post_operand_latency_definition(b);

post_temporary_use_latency_definition(b);

if (!options->disable_precedence_variables()) {

post_precedence_definition(b);

}

post_temporary_users_definition(b);

// The register of an operand is equal to the register of its selected

// temporary, if this is not the null temporary

for (operation o : input->ops[b])

for (operand p : input->operands[o])

if (input->use[p]) {

IntVarArgs rs;

for (temporary t1 : input->temps[p])

rs << (t1 == NULL_TEMPORARY ? IntVar(*this, -1, -1) : r(t1));

constraint(ry(p) == element(rs, y(p)));

} else {

constraint(ry(p) == r(input->single_temp[p]));

}

// The live range of a temporary starts at the issue cycle of its definer:

for (temporary t : input->tmp[b])

constraint(ls(t) == c(input->oper[input->definer[t]]));

// The live range of a temporary t is as long as the distance between its live

// end and its live start:

for (temporary t : input->tmp[b])

constraint(ld(t) == (le(t) - ls(t)));

// The live range of a temporary ends at the last issue cycle of its users:

for (temporary t : input->tmp[b]) {

IntVarArgs uc; // Issue cycle of each operation that may use t, if t is used

// Minimum live range end, otherwise

for (operand p : input->users[t])

uc << var(ite(u(p, t), c(input->oper[p]), 0));

uc << var(ls(t) + input->minlive[t]);

constraint(le(t) == max(uc));

}

// Operands cannot be connected to null temporaries:

for (operand p : input->ope[b]) {

if (must_connect(p))

constraint(x(p));

else

constraint(x(p) == (y(p) > 0));

}

// al[t][rs] <-> t is allocated to register space rs

for (temporary t : input->tmp[b])

for (register_space rs : input->RS)

constraint(al(rs, t) == partially_in_register_space(t, rs));

// u[p][t] <-> operand p is connected to temporary t

for (operation o : input->ops[b])

for (operand p : input->operands[o])

if (input->use[p]) {

BoolVarArgs us;

for (temporary t1 : input->temps[p]) us << u(p, t1);

channel(*this, us, y(p), 0, ipl);

}

// us[t] == number of times temporary t is used

for (temporary t : input->tmp[b]) {

BoolVarArgs uses;

for (operand p : input->users[t]) uses << u(p, t);

constraint(us(t) == sum(uses));

}

// lt[p] == latency of operand p

for (operation o : input->ops[b])

for (unsigned pi = 0; pi < input->operands[o].size(); pi++) {

operand p = input->operands[o][pi];

int samelat = -1;

for (unsigned int ii = 0; ii < input->instructions[o].size(); ii++) {

int l = input->lat[o][ii][pi];

/*if (input->instructions[o][ii]>0) - can't do that - apparently lt(p) can be used even if i(o) == 0 */ {

if (samelat==l || samelat==-1)

samelat = l;

else

samelat = -2;

}

}

if (samelat>=0) {

constraint(lt(p) == samelat);

} else {

IntArgs lats;

for (unsigned int ii = 0; ii < input->instructions[o].size(); ii++)

lats << input->lat[o][ii][pi];

constraint(lt(p) == element(lats, i(o)));

}

}

// lat[p][t] == latency of operand p using temporary t

for (operation o : input->ops[b])

for (operand q : input->operands[o])

if (input->use[q])

for (temporary t : input->temps[q])

if (t != NULL_TEMPORARY) {

operand p = input->definer[t];

constraint(lat(q, t) == lt(p) + slack(p) + lt(q) + slack(q));

}

// p[o1][o2] <-> operation o1 precedes operation o2

for (operation o1 : input->mandatory[b])

for (operation o2 : input->mandatory[b])

constraint(p(o1, o2) == (c(o1) < c(o2)));

// users[t] == set of use operands connected to t

for (temporary t : input->tmp[b]) {

IntArgs ps(input->users[t]);

constraint(users(t) <= IntSet(ps));

for (operand p : input->users[t]) {

constraint(u(p, t) == (users(t) >= singleton(p)));

}

}

post_connected_users_constraints(b);

post_active_instructions_constraints(b);

post_register_class_constraints(b);

post_disjoint_live_ranges_constraints(b);

post_preassignment_constraints(b);

post_alignment_constraints(b);

post_packing_constraints(b);

post_extensional_constraints(b);

post_processor_resources_constraints(b);

post_initial_precedence_constraints(b);

post_data_precedences_constraints(b);

post_fixed_precedences_constraints(b);

post_prescheduling_constraints(b);

post_bypassing_constraints(b);

post_adhoc_constraints(b);

// A temporary is live iff it is connected to a user;

// If it's live, then its register must be among the users' registers,

// otherwise its register must be -1:

for (temporary t : input->tmp[b]) {

constraint(l(t) == (us(t) > 0));

IntVarArgs ruses;

for (operand p : input->users[t]) ruses << ry(p);

operand p = input->definer[t];

if (!must_connect(p)) ruses << IntVar(*this, -1, -1);

member(*this, ruses, r(t), ipl);

}

// Active operations are implemented by non-null instructions:

for (operation o : input->ops[b])

if (is_optional(o))

constraint(a(o) == (i(o) > 0));

else

constraint(a(o));

// The instruction that implements an operation determines the register class

// to which its operands are allocated:

for (operation o : input->ops[b])

for (unsigned pi = 0; pi < input->operands[o].size(); pi++) {

operand p = input->operands[o][pi];

IntVarArgs atoms;

for (unsigned int ii = 0; ii < input->instructions[o].size(); ii++) {

instruction i = input->instructions[o][ii];

if (i == NULL_INSTRUCTION) {

atoms << var(NULL_REGISTER);

} else {

register_class rc = input->rclass[o][ii][pi];

IntSet Drt;

register_space rs = input->space[rc];

// If a definition temporary is allocated to an infinite space, its

// register can be pre-assigned to a narrow range:

if (!options->disable_presolver_constraints() &&

!options->disable_infinite_register_dominance_constraints() &&

!input->use[p] &&

input->infinite[rs] &&

input->infinite_atom_range.count(

make_pair(input->single_temp[p], rs))) {

temporary t = input->single_temp[p];

pair<temporary, register_space> trs = make_pair(t, rs);

register_atom fra = input->infinite_atom_range[trs][0],

lra = input->infinite_atom_range[trs][1];

int n = ((lra - fra) / input->width[t]) + 1;

Drt = IntSet(IntArgs::create(n, fra, input->width[t]));

} else {

IntSetRanges irs(input->atom_set[rc]);

Drt = IntSet(irs);

}

atoms << IntVar(*this, Drt);

}

}

if (input->delimiter[o] && !must_connect(p)) {

assert(atoms.size() == 1);

constraint(ry(p) == ite(x(p), atoms[0], NULL_REGISTER));

} else {

constraint(ry(p) == element(atoms, i(o)));

}

}

// Temporaries whose live ranges overlap are assigned to different register

// atoms:

IntVarArgs bld, bw, bre,

br = temps_to_var_args(v_r, input->tmp[b]),

bls = temps_to_var_args(v_ls, input->tmp[b]),

ble = temps_to_var_args(v_le, input->tmp[b]);

BoolVarArgs bm;

for (temporary t : input->tmp[b]) {

bld << ld(t);

bw << var(input->width[t]);

bre << var(r(t) + input->width[t]);

bm << var(l(t) && (ld(t) > 0));

}

nooverlap(*this, br, bw, bre, bls, bld, ble, bm, ipl);

// Certain operands are pre-assigned to registers:

for (vector<int> pa : input->preassign) {

operand p = pa[0];

register_atom a = pa[1];

if (input->pb[p] == b) constraint(ry(p) == a);

}

// Aligned operands are assigned to registers at a given relative distance:

for (unsigned int ai = 0; ai < input->baligned[b].size(); ai++) {

operand p = input->baligned[b][ai][0],

q = input->baligned[b][ai][2];

operation op = input->oper[p],

oq = input->oper[q];

instruction i = input->baligned[b][ai][1],

j = input->baligned[b][ai][3];

int adist = input->badist[b][ai];

if (input->instructions[op].size()==1 && input->instructions[oq].size()==1) {

constraint(ry(p) == ry(q) + adist);

} else {

IntVar ryqa(*this, ry(q).min()+adist, ry(q).max()+adist);

constraint(ryqa == (ry(q) + adist));

BoolVar r(*this, 0, 1);

rel(*this, ry(p), IRT_EQ, ryqa, r, ipl);

constraint(!imp(op, i) || !imp(oq, j) || r);

}

}

// Packed operands are assigned to contiguous, complementary registers:

for (vector<operand> ps : input->bpacked[b]) {

operand p = ps[0], q = ps[1];

int w = input->operand_width[p];

BoolVarArgs cases;

IntVarArgs ryps;

// first case: bound operand packed in high component

cases << var(x(p) && ((ry(p) % (w*2)) == 0));

ryps << var(ry(p) + w);

// second case: bound operand packed in low component

cases << var(x(p) && ((ry(p) % (w*2)) != 0));

ryps << var(ry(p) - w);

// third case: bound operand not packed

cases << var(!x(p));

IntVar any(*this, Gecode::Int::Limits::min, Gecode::Int::Limits::max);

ryps << any;

IntVar idx(*this, 0, 2);

channel(*this, cases, idx);

constraint(ry(q) == element(ryps, idx));

}

// The registers assigned to some pairs of operands are related extensionally:

for (unsigned int i = 0; i < input->exrelated.size(); i++) {

operand p = input->exrelated[i][0],

q = input->exrelated[i][1];

if (input->pb[p] == b) {

IntVarArgs rys;

rys << ry(p) << ry(q);

TupleSet ts(input->table[i][0].size());

for (vector<int> row : input->table[i]) ts.add(IntArgs(row));

ts.finalize();

extensional(*this, rys, ts);

}

}

// An operation that uses a temporary must be preceded by its definer:

// Cycle in which t is defined (taking into account its definition latency)

IntVarArgs ct;

map<temporary, unsigned int> ctindex;

unsigned int i = 0;

for (temporary t : input->tmp[b]) {

operand p = input->definer[t];

operation d = input->oper[p];

ct << var(c(d) + max(input->min_active_lat[p], lt(p)) + slack(p));

ctindex[t] = i;

i++;

}

for (operation u : input->ops[b])

if (input->type[u] != KILL) // handled in post_kill_issue_cycle_constraints()

for (operand q : input->operands[u])

if (input->use[q]) {

IntVarArgs cs;

for (temporary t : input->temps[q])

if (t == NULL_TEMPORARY) {

IntVarArgs pcs;

// TODO: can we use a tighter bound here?

for (temporary t1 : input->real_temps[q])

pcs << var(c(input->def_opr[t1]));

cs << var(min(pcs));

} else {

// Maximum of the definition cycle of t and the definition cycle of

// the ultimate source of t

IntVarArgs cts;

cts << ct[ctindex[t]];

cts << ct[ctindex[input->ultimate_source[t]]];

cs << var(max(cts));

}

constraint(c(u) >= element(cs, y(q)) + lt(q) + slack(q));

}

// The capacity of processor resources cannot be exceeded at any issue cycle:

vector<resource> essential_r;

map<resource, vector<UsageTask> > r2tasks;

for (resource r : input->R)

if (!contains(input->subsumed_resources[b], r))

essential_r.push_back(r);

for (operation o : input->ops[b]) {

typedef int instruction_index;

// Map from consumption to tasks for each resource

vector<map<int, vector<instruction_index> > > rc2tasks;

map<int, vector<instruction_index> > emptyMap;

init_vector(rc2tasks, input->R.size(), emptyMap);

// Complete map with tasks grouped by consumption

for (unsigned int ii = 0; ii < input->instructions[o].size(); ii++) {

instruction i = input->instructions[o][ii];

for (resource r : essential_r) {

int con = input->con[i][r],

dur = input->dur[i][r];

if (con > 0 && dur > 0)

rc2tasks[r][con].push_back(ii);

}

}

// For each operation, resource and consumption, define a task possibly

// related to several instructions

for (resource r : essential_r) {

for (auto ctts : rc2tasks[r]) {

IntArgs iis;

vector<int> durs, offs;

set<instruction> involved;

vector<int> involved_durs;

for (instruction_index ii : ctts.second) {