cavs: memory bank powerup flow adjustment #7086
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Memory banks enablement flow is adjusted to recommended approach. Power status should be read twice to ensure ebb readiness Signed-off-by: Michal Bukowski <michal.bukowski@intel.com> (cherry picked from commit aaac08a)
sathyap-chrome
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dbaluta,
lbetlej,
lgirdwood,
mmaka1 and
plbossart
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Moved the fix to RPL 001. kindly help merge |
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Dup of #7083 |
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Duplicate. |
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Memory banks enablement flow is adjusted to recommended approach. Power status should be read twice to ensure ebb readiness
Signed-off-by: Michal Bukowski michal.bukowski@intel.com
(cherry picked from commit aaac08a)