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/*M///////////////////////////////////////////////////////////////////////////////////////
//
// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.
//
// By downloading, copying, installing or using the software you agree to this license.
// If you do not agree to this license, do not download, install,
// copy or use the software.
//
//
// License Agreement
// For Open Source Computer Vision Library
//
// Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
// Copyright (C) 2009-2011, Willow Garage Inc., all rights reserved.
// Third party copyrights are property of their respective owners.
//
// Redistribution and use in source and binary forms, with or without modification,
// are permitted provided that the following conditions are met:
//
// * Redistribution's of source code must retain the above copyright notice,
// this list of conditions and the following disclaimer.
//
// * Redistribution's in binary form must reproduce the above copyright notice,
// this list of conditions and the following disclaimer in the documentation
// and/or other materials provided with the distribution.
//
// * The name of the copyright holders may not be used to endorse or promote products
// derived from this software without specific prior written permission.
//
// This software is provided by the copyright holders and contributors "as is" and
// any express or implied warranties, including, but not limited to, the implied
// warranties of merchantability and fitness for a particular purpose are disclaimed.
// In no event shall the Intel Corporation or contributors be liable for any direct,
// indirect, incidental, special, exemplary, or consequential damages
// (including, but not limited to, procurement of substitute goods or services;
// loss of use, data, or profits; or business interruption) however caused
// and on any theory of liability, whether in contract, strict liability,
// or tort (including negligence or otherwise) arising in any way out of
// the use of this software, even if advised of the possibility of such damage.
//
//M*/
/* ////////////////////////////////////////////////////////////////////
//
// Arithmetic and logical operations: +, -, *, /, &, |, ^, ~, abs ...
//
// */
#include "precomp.hpp"
namespace cv
{
#if ARITHM_USE_IPP
struct IPPArithmInitializer
{
IPPArithmInitializer(void)
{
ippStaticInit();
}
};
IPPArithmInitializer ippArithmInitializer;
#endif
struct NOP {};
template<typename T, class Op, class Op8>
void vBinOp8(const T* src1, size_t step1, const T* src2, size_t step2, T* dst, size_t step, Size sz)
{
#if CV_SSE2
Op8 op8;
#endif
Op op;
for( ; sz.height--; src1 += step1/sizeof(src1[0]),
src2 += step2/sizeof(src2[0]),
dst += step/sizeof(dst[0]) )
{
int x = 0;
#if CV_SSE2
if( USE_SSE2 )
{
for( ; x <= sz.width - 32; x += 32 )
{
__m128i r0 = _mm_loadu_si128((const __m128i*)(src1 + x));
__m128i r1 = _mm_loadu_si128((const __m128i*)(src1 + x + 16));
r0 = op8(r0,_mm_loadu_si128((const __m128i*)(src2 + x)));
r1 = op8(r1,_mm_loadu_si128((const __m128i*)(src2 + x + 16)));
_mm_storeu_si128((__m128i*)(dst + x), r0);
_mm_storeu_si128((__m128i*)(dst + x + 16), r1);
}
for( ; x <= sz.width - 8; x += 8 )
{
__m128i r0 = _mm_loadl_epi64((const __m128i*)(src1 + x));
r0 = op8(r0,_mm_loadl_epi64((const __m128i*)(src2 + x)));
_mm_storel_epi64((__m128i*)(dst + x), r0);
}
}
#endif
#if CV_ENABLE_UNROLLED
for( ; x <= sz.width - 4; x += 4 )
{
T v0 = op(src1[x], src2[x]);
T v1 = op(src1[x+1], src2[x+1]);
dst[x] = v0; dst[x+1] = v1;
v0 = op(src1[x+2], src2[x+2]);
v1 = op(src1[x+3], src2[x+3]);
dst[x+2] = v0; dst[x+3] = v1;
}
#endif
for( ; x < sz.width; x++ )
dst[x] = op(src1[x], src2[x]);
}
}
template<typename T, class Op, class Op16>
void vBinOp16(const T* src1, size_t step1, const T* src2, size_t step2,
T* dst, size_t step, Size sz)
{
#if CV_SSE2
Op16 op16;
#endif
Op op;
for( ; sz.height--; src1 += step1/sizeof(src1[0]),
src2 += step2/sizeof(src2[0]),
dst += step/sizeof(dst[0]) )
{
int x = 0;
#if CV_SSE2
if( USE_SSE2 )
{
for( ; x <= sz.width - 16; x += 16 )
{
__m128i r0 = _mm_loadu_si128((const __m128i*)(src1 + x));
__m128i r1 = _mm_loadu_si128((const __m128i*)(src1 + x + 8));
r0 = op16(r0,_mm_loadu_si128((const __m128i*)(src2 + x)));
r1 = op16(r1,_mm_loadu_si128((const __m128i*)(src2 + x + 8)));
_mm_storeu_si128((__m128i*)(dst + x), r0);
_mm_storeu_si128((__m128i*)(dst + x + 8), r1);
}
for( ; x <= sz.width - 4; x += 4 )
{
__m128i r0 = _mm_loadl_epi64((const __m128i*)(src1 + x));
r0 = op16(r0,_mm_loadl_epi64((const __m128i*)(src2 + x)));
_mm_storel_epi64((__m128i*)(dst + x), r0);
}
}
else
#endif
for( ; x <= sz.width - 4; x += 4 )
{
T v0 = op(src1[x], src2[x]);
T v1 = op(src1[x+1], src2[x+1]);
dst[x] = v0; dst[x+1] = v1;
v0 = op(src1[x+2], src2[x+2]);
v1 = op(src1[x+3], src2[x+3]);
dst[x+2] = v0; dst[x+3] = v1;
}
for( ; x < sz.width; x++ )
dst[x] = op(src1[x], src2[x]);
}
}
template<class Op, class Op32>
void vBinOp32s(const int* src1, size_t step1, const int* src2, size_t step2,
int* dst, size_t step, Size sz)
{
#if CV_SSE2
Op32 op32;
#endif
Op op;
for( ; sz.height--; src1 += step1/sizeof(src1[0]),
src2 += step2/sizeof(src2[0]),
dst += step/sizeof(dst[0]) )
{
int x = 0;
#if CV_SSE2
if( USE_SSE2 )
{
if( (((size_t)src1|(size_t)src2|(size_t)dst)&15) == 0 )
for( ; x <= sz.width - 8; x += 8 )
{
__m128i r0 = _mm_load_si128((const __m128i*)(src1 + x));
__m128i r1 = _mm_load_si128((const __m128i*)(src1 + x + 4));
r0 = op32(r0,_mm_load_si128((const __m128i*)(src2 + x)));
r1 = op32(r1,_mm_load_si128((const __m128i*)(src2 + x + 4)));
_mm_store_si128((__m128i*)(dst + x), r0);
_mm_store_si128((__m128i*)(dst + x + 4), r1);
}
else
for( ; x <= sz.width - 8; x += 8 )
{
__m128i r0 = _mm_loadu_si128((const __m128i*)(src1 + x));
__m128i r1 = _mm_loadu_si128((const __m128i*)(src1 + x + 4));
r0 = op32(r0,_mm_loadu_si128((const __m128i*)(src2 + x)));
r1 = op32(r1,_mm_loadu_si128((const __m128i*)(src2 + x + 4)));
_mm_storeu_si128((__m128i*)(dst + x), r0);
_mm_storeu_si128((__m128i*)(dst + x + 4), r1);
}
}
#endif
#if CV_ENABLE_UNROLLED
for( ; x <= sz.width - 4; x += 4 )
{
int v0 = op(src1[x], src2[x]);
int v1 = op(src1[x+1], src2[x+1]);
dst[x] = v0; dst[x+1] = v1;
v0 = op(src1[x+2], src2[x+2]);
v1 = op(src1[x+3], src2[x+3]);
dst[x+2] = v0; dst[x+3] = v1;
}
#endif
for( ; x < sz.width; x++ )
dst[x] = op(src1[x], src2[x]);
}
}
template<class Op, class Op32>
void vBinOp32f(const float* src1, size_t step1, const float* src2, size_t step2,
float* dst, size_t step, Size sz)
{
#if CV_SSE2
Op32 op32;
#endif
Op op;
for( ; sz.height--; src1 += step1/sizeof(src1[0]),
src2 += step2/sizeof(src2[0]),
dst += step/sizeof(dst[0]) )
{
int x = 0;
#if CV_SSE2
if( USE_SSE2 )
{
if( (((size_t)src1|(size_t)src2|(size_t)dst)&15) == 0 )
for( ; x <= sz.width - 8; x += 8 )
{
__m128 r0 = _mm_load_ps(src1 + x);
__m128 r1 = _mm_load_ps(src1 + x + 4);
r0 = op32(r0,_mm_load_ps(src2 + x));
r1 = op32(r1,_mm_load_ps(src2 + x + 4));
_mm_store_ps(dst + x, r0);
_mm_store_ps(dst + x + 4, r1);
}
else
for( ; x <= sz.width - 8; x += 8 )
{
__m128 r0 = _mm_loadu_ps(src1 + x);
__m128 r1 = _mm_loadu_ps(src1 + x + 4);
r0 = op32(r0,_mm_loadu_ps(src2 + x));
r1 = op32(r1,_mm_loadu_ps(src2 + x + 4));
_mm_storeu_ps(dst + x, r0);
_mm_storeu_ps(dst + x + 4, r1);
}
}
#endif
#if CV_ENABLE_UNROLLED
for( ; x <= sz.width - 4; x += 4 )
{
float v0 = op(src1[x], src2[x]);
float v1 = op(src1[x+1], src2[x+1]);
dst[x] = v0; dst[x+1] = v1;
v0 = op(src1[x+2], src2[x+2]);
v1 = op(src1[x+3], src2[x+3]);
dst[x+2] = v0; dst[x+3] = v1;
}
#endif
for( ; x < sz.width; x++ )
dst[x] = op(src1[x], src2[x]);
}
}
template<class Op, class Op64>
void vBinOp64f(const double* src1, size_t step1, const double* src2, size_t step2,
double* dst, size_t step, Size sz)
{
#if CV_SSE2
Op64 op64;
#endif
Op op;
for( ; sz.height--; src1 += step1/sizeof(src1[0]),
src2 += step2/sizeof(src2[0]),
dst += step/sizeof(dst[0]) )
{
int x = 0;
#if CV_SSE2
if( USE_SSE2 && (((size_t)src1|(size_t)src2|(size_t)dst)&15) == 0 )
for( ; x <= sz.width - 4; x += 4 )
{
__m128d r0 = _mm_load_pd(src1 + x);
__m128d r1 = _mm_load_pd(src1 + x + 2);
r0 = op64(r0,_mm_load_pd(src2 + x));
r1 = op64(r1,_mm_load_pd(src2 + x + 2));
_mm_store_pd(dst + x, r0);
_mm_store_pd(dst + x + 2, r1);
}
else
#endif
for( ; x <= sz.width - 4; x += 4 )
{
double v0 = op(src1[x], src2[x]);
double v1 = op(src1[x+1], src2[x+1]);
dst[x] = v0; dst[x+1] = v1;
v0 = op(src1[x+2], src2[x+2]);
v1 = op(src1[x+3], src2[x+3]);
dst[x+2] = v0; dst[x+3] = v1;
}
for( ; x < sz.width; x++ )
dst[x] = op(src1[x], src2[x]);
}
}
#if CV_SSE2
struct _VAdd8u { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_adds_epu8(a,b); }};
struct _VSub8u { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_subs_epu8(a,b); }};
struct _VMin8u { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_min_epu8(a,b); }};
struct _VMax8u { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_max_epu8(a,b); }};
struct _VAbsDiff8u
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{ return _mm_add_epi8(_mm_subs_epu8(a,b),_mm_subs_epu8(b,a)); }
};
struct _VAdd8s { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_adds_epi8(a,b); }};
struct _VSub8s { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_subs_epi8(a,b); }};
struct _VMin8s
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{
__m128i m = _mm_cmpgt_epi8(a, b);
return _mm_xor_si128(a, _mm_and_si128(_mm_xor_si128(a, b), m));
}
};
struct _VMax8s
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{
__m128i m = _mm_cmpgt_epi8(b, a);
return _mm_xor_si128(a, _mm_and_si128(_mm_xor_si128(a, b), m));
}
};
struct _VAbsDiff8s
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{
__m128i d = _mm_subs_epi8(a, b);
__m128i m = _mm_cmpgt_epi8(b, a);
return _mm_subs_epi8(_mm_xor_si128(d, m), m);
}
};
struct _VAdd16u { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_adds_epu16(a,b); }};
struct _VSub16u { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_subs_epu16(a,b); }};
struct _VMin16u
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{ return _mm_subs_epu16(a,_mm_subs_epu16(a,b)); }
};
struct _VMax16u
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{ return _mm_adds_epu16(_mm_subs_epu16(a,b),b); }
};
struct _VAbsDiff16u
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{ return _mm_add_epi16(_mm_subs_epu16(a,b),_mm_subs_epu16(b,a)); }
};
struct _VAdd16s { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_adds_epi16(a,b); }};
struct _VSub16s { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_subs_epi16(a,b); }};
struct _VMin16s { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_min_epi16(a,b); }};
struct _VMax16s { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_max_epi16(a,b); }};
struct _VAbsDiff16s
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{
__m128i M = _mm_max_epi16(a,b), m = _mm_min_epi16(a,b);
return _mm_subs_epi16(M, m);
}
};
struct _VAdd32s { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_add_epi32(a,b); }};
struct _VSub32s { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_sub_epi32(a,b); }};
struct _VMin32s
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{
__m128i m = _mm_cmpgt_epi32(a, b);
return _mm_xor_si128(a, _mm_and_si128(_mm_xor_si128(a, b), m));
}
};
struct _VMax32s
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{
__m128i m = _mm_cmpgt_epi32(b, a);
return _mm_xor_si128(a, _mm_and_si128(_mm_xor_si128(a, b), m));
}
};
struct _VAbsDiff32s
{
__m128i operator()(const __m128i& a, const __m128i& b) const
{
__m128i d = _mm_sub_epi32(a, b);
__m128i m = _mm_cmpgt_epi32(b, a);
return _mm_sub_epi32(_mm_xor_si128(d, m), m);
}
};
struct _VAdd32f { __m128 operator()(const __m128& a, const __m128& b) const { return _mm_add_ps(a,b); }};
struct _VSub32f { __m128 operator()(const __m128& a, const __m128& b) const { return _mm_sub_ps(a,b); }};
struct _VMin32f { __m128 operator()(const __m128& a, const __m128& b) const { return _mm_min_ps(a,b); }};
struct _VMax32f { __m128 operator()(const __m128& a, const __m128& b) const { return _mm_max_ps(a,b); }};
static unsigned int CV_DECL_ALIGNED(16) v32f_absmask[] = { 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff };
struct _VAbsDiff32f
{
__m128 operator()(const __m128& a, const __m128& b) const
{
return _mm_and_ps(_mm_sub_ps(a,b), *(const __m128*)v32f_absmask);
}
};
struct _VAdd64f { __m128d operator()(const __m128d& a, const __m128d& b) const { return _mm_add_pd(a,b); }};
struct _VSub64f { __m128d operator()(const __m128d& a, const __m128d& b) const { return _mm_sub_pd(a,b); }};
struct _VMin64f { __m128d operator()(const __m128d& a, const __m128d& b) const { return _mm_min_pd(a,b); }};
struct _VMax64f { __m128d operator()(const __m128d& a, const __m128d& b) const { return _mm_max_pd(a,b); }};
static unsigned int CV_DECL_ALIGNED(16) v64f_absmask[] = { 0xffffffff, 0x7fffffff, 0xffffffff, 0x7fffffff };
struct _VAbsDiff64f
{
__m128d operator()(const __m128d& a, const __m128d& b) const
{
return _mm_and_pd(_mm_sub_pd(a,b), *(const __m128d*)v64f_absmask);
}
};
struct _VAnd8u { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_and_si128(a,b); }};
struct _VOr8u { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_or_si128(a,b); }};
struct _VXor8u { __m128i operator()(const __m128i& a, const __m128i& b) const { return _mm_xor_si128(a,b); }};
struct _VNot8u { __m128i operator()(const __m128i& a, const __m128i&) const { return _mm_xor_si128(_mm_set1_epi32(-1),a); }};
#endif
#if CV_SSE2
#define IF_SIMD(op) op
#else
#define IF_SIMD(op) NOP
#endif
template<> inline uchar OpAdd<uchar>::operator ()(uchar a, uchar b) const
{ return CV_FAST_CAST_8U(a + b); }
template<> inline uchar OpSub<uchar>::operator ()(uchar a, uchar b) const
{ return CV_FAST_CAST_8U(a - b); }
template<typename T> struct OpAbsDiff
{
typedef T type1;
typedef T type2;
typedef T rtype;
T operator()(T a, T b) const { return (T)std::abs(a - b); }
};
template<> inline short OpAbsDiff<short>::operator ()(short a, short b) const
{ return saturate_cast<short>(std::abs(a - b)); }
template<> inline schar OpAbsDiff<schar>::operator ()(schar a, schar b) const
{ return saturate_cast<schar>(std::abs(a - b)); }
template<typename T, typename WT=T> struct OpAbsDiffS
{
typedef T type1;
typedef WT type2;
typedef T rtype;
T operator()(T a, WT b) const { return saturate_cast<T>(std::abs(a - b)); }
};
template<typename T> struct OpAnd
{
typedef T type1;
typedef T type2;
typedef T rtype;
T operator()( T a, T b ) const { return a & b; }
};
template<typename T> struct OpOr
{
typedef T type1;
typedef T type2;
typedef T rtype;
T operator()( T a, T b ) const { return a | b; }
};
template<typename T> struct OpXor
{
typedef T type1;
typedef T type2;
typedef T rtype;
T operator()( T a, T b ) const { return a ^ b; }
};
template<typename T> struct OpNot
{
typedef T type1;
typedef T type2;
typedef T rtype;
T operator()( T a, T ) const { return ~a; }
};
#if defined(__clang__)
#pragma clang diagnostic push
#pragma clang diagnostic ignored "-Wunused-function"
#endif
static inline void fixSteps(Size sz, size_t elemSize, size_t& step1, size_t& step2, size_t& step)
{
if( sz.height == 1 )
step1 = step2 = step = sz.width*elemSize;
}
#if defined(__clang__)
#pragma clang diagnostic pop
#endif
static void add8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAdd_8u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz), 0),
(vBinOp8<uchar, OpAdd<uchar>, IF_SIMD(_VAdd8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void add8s( const schar* src1, size_t step1,
const schar* src2, size_t step2,
schar* dst, size_t step, Size sz, void* )
{
vBinOp8<schar, OpAdd<schar>, IF_SIMD(_VAdd8s)>(src1, step1, src2, step2, dst, step, sz);
}
static void add16u( const ushort* src1, size_t step1,
const ushort* src2, size_t step2,
ushort* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAdd_16u_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz), 0),
(vBinOp16<ushort, OpAdd<ushort>, IF_SIMD(_VAdd16u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void add16s( const short* src1, size_t step1,
const short* src2, size_t step2,
short* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAdd_16s_C1RSfs(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz), 0),
(vBinOp16<short, OpAdd<short>, IF_SIMD(_VAdd16s)>(src1, step1, src2, step2, dst, step, sz)));
}
static void add32s( const int* src1, size_t step1,
const int* src2, size_t step2,
int* dst, size_t step, Size sz, void* )
{
vBinOp32s<OpAdd<int>, IF_SIMD(_VAdd32s)>(src1, step1, src2, step2, dst, step, sz);
}
static void add32f( const float* src1, size_t step1,
const float* src2, size_t step2,
float* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAdd_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz)),
(vBinOp32f<OpAdd<float>, IF_SIMD(_VAdd32f)>(src1, step1, src2, step2, dst, step, sz)));
}
static void add64f( const double* src1, size_t step1,
const double* src2, size_t step2,
double* dst, size_t step, Size sz, void* )
{
vBinOp64f<OpAdd<double>, IF_SIMD(_VAdd64f)>(src1, step1, src2, step2, dst, step, sz);
}
static void sub8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiSub_8u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz), 0),
(vBinOp8<uchar, OpSub<uchar>, IF_SIMD(_VSub8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void sub8s( const schar* src1, size_t step1,
const schar* src2, size_t step2,
schar* dst, size_t step, Size sz, void* )
{
vBinOp8<schar, OpSub<schar>, IF_SIMD(_VSub8s)>(src1, step1, src2, step2, dst, step, sz);
}
static void sub16u( const ushort* src1, size_t step1,
const ushort* src2, size_t step2,
ushort* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiSub_16u_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz), 0),
(vBinOp16<ushort, OpSub<ushort>, IF_SIMD(_VSub16u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void sub16s( const short* src1, size_t step1,
const short* src2, size_t step2,
short* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiSub_16s_C1RSfs(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz), 0),
(vBinOp16<short, OpSub<short>, IF_SIMD(_VSub16s)>(src1, step1, src2, step2, dst, step, sz)));
}
static void sub32s( const int* src1, size_t step1,
const int* src2, size_t step2,
int* dst, size_t step, Size sz, void* )
{
vBinOp32s<OpSub<int>, IF_SIMD(_VSub32s)>(src1, step1, src2, step2, dst, step, sz);
}
static void sub32f( const float* src1, size_t step1,
const float* src2, size_t step2,
float* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiSub_32f_C1R(src2, (int)step2, src1, (int)step1, dst, (int)step, ippiSize(sz)),
(vBinOp32f<OpSub<float>, IF_SIMD(_VSub32f)>(src1, step1, src2, step2, dst, step, sz)));
}
static void sub64f( const double* src1, size_t step1,
const double* src2, size_t step2,
double* dst, size_t step, Size sz, void* )
{
vBinOp64f<OpSub<double>, IF_SIMD(_VSub64f)>(src1, step1, src2, step2, dst, step, sz);
}
template<> inline uchar OpMin<uchar>::operator ()(uchar a, uchar b) const { return CV_MIN_8U(a, b); }
template<> inline uchar OpMax<uchar>::operator ()(uchar a, uchar b) const { return CV_MAX_8U(a, b); }
static void max8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
#if (ARITHM_USE_IPP == 1)
{
uchar* s1 = (uchar*)src1;
uchar* s2 = (uchar*)src2;
uchar* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMaxEvery_8u(s1, s2, d, sz.width);
s1 += step1;
s2 += step2;
d += step;
}
}
#else
vBinOp8<uchar, OpMax<uchar>, IF_SIMD(_VMax8u)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMaxEvery_8u_C1R(src1, (int)step1, src2, (int)step2, dst, ippiSize(sz)),
// (vBinOp8<uchar, OpMax<uchar>, IF_SIMD(_VMax8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void max8s( const schar* src1, size_t step1,
const schar* src2, size_t step2,
schar* dst, size_t step, Size sz, void* )
{
vBinOp8<schar, OpMax<schar>, IF_SIMD(_VMax8s)>(src1, step1, src2, step2, dst, step, sz);
}
static void max16u( const ushort* src1, size_t step1,
const ushort* src2, size_t step2,
ushort* dst, size_t step, Size sz, void* )
{
#if (ARITHM_USE_IPP == 1)
{
ushort* s1 = (ushort*)src1;
ushort* s2 = (ushort*)src2;
ushort* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMaxEvery_16u(s1, s2, d, sz.width);
s1 = (ushort*)((uchar*)s1 + step1);
s2 = (ushort*)((uchar*)s2 + step2);
d = (ushort*)((uchar*)d + step);
}
}
#else
vBinOp16<ushort, OpMax<ushort>, IF_SIMD(_VMax16u)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMaxEvery_16u_C1R(src1, (int)step1, src2, (int)step2, dst, ippiSize(sz)),
// (vBinOp16<ushort, OpMax<ushort>, IF_SIMD(_VMax16u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void max16s( const short* src1, size_t step1,
const short* src2, size_t step2,
short* dst, size_t step, Size sz, void* )
{
vBinOp16<short, OpMax<short>, IF_SIMD(_VMax16s)>(src1, step1, src2, step2, dst, step, sz);
}
static void max32s( const int* src1, size_t step1,
const int* src2, size_t step2,
int* dst, size_t step, Size sz, void* )
{
vBinOp32s<OpMax<int>, IF_SIMD(_VMax32s)>(src1, step1, src2, step2, dst, step, sz);
}
static void max32f( const float* src1, size_t step1,
const float* src2, size_t step2,
float* dst, size_t step, Size sz, void* )
{
#if (ARITHM_USE_IPP == 1)
{
float* s1 = (float*)src1;
float* s2 = (float*)src2;
float* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMaxEvery_32f(s1, s2, d, sz.width);
s1 = (float*)((uchar*)s1 + step1);
s2 = (float*)((uchar*)s2 + step2);
d = (float*)((uchar*)d + step);
}
}
#else
vBinOp32f<OpMax<float>, IF_SIMD(_VMax32f)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMaxEvery_32f_C1R(src1, (int)step1, src2, (int)step2, dst, ippiSize(sz)),
// (vBinOp32f<OpMax<float>, IF_SIMD(_VMax32f)>(src1, step1, src2, step2, dst, step, sz)));
}
static void max64f( const double* src1, size_t step1,
const double* src2, size_t step2,
double* dst, size_t step, Size sz, void* )
{
vBinOp64f<OpMax<double>, IF_SIMD(_VMax64f)>(src1, step1, src2, step2, dst, step, sz);
}
static void min8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
#if (ARITHM_USE_IPP == 1)
{
uchar* s1 = (uchar*)src1;
uchar* s2 = (uchar*)src2;
uchar* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMinEvery_8u(s1, s2, d, sz.width);
s1 += step1;
s2 += step2;
d += step;
}
}
#else
vBinOp8<uchar, OpMin<uchar>, IF_SIMD(_VMin8u)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMinEvery_8u_C1R(src1, (int)step1, src2, (int)step2, dst, ippiSize(sz)),
// (vBinOp8<uchar, OpMin<uchar>, IF_SIMD(_VMin8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void min8s( const schar* src1, size_t step1,
const schar* src2, size_t step2,
schar* dst, size_t step, Size sz, void* )
{
vBinOp8<schar, OpMin<schar>, IF_SIMD(_VMin8s)>(src1, step1, src2, step2, dst, step, sz);
}
static void min16u( const ushort* src1, size_t step1,
const ushort* src2, size_t step2,
ushort* dst, size_t step, Size sz, void* )
{
#if (ARITHM_USE_IPP == 1)
{
ushort* s1 = (ushort*)src1;
ushort* s2 = (ushort*)src2;
ushort* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMinEvery_16u(s1, s2, d, sz.width);
s1 = (ushort*)((uchar*)s1 + step1);
s2 = (ushort*)((uchar*)s2 + step2);
d = (ushort*)((uchar*)d + step);
}
}
#else
vBinOp16<ushort, OpMin<ushort>, IF_SIMD(_VMin16u)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMinEvery_16u_C1R(src1, (int)step1, src2, (int)step2, dst, ippiSize(sz)),
// (vBinOp16<ushort, OpMin<ushort>, IF_SIMD(_VMin16u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void min16s( const short* src1, size_t step1,
const short* src2, size_t step2,
short* dst, size_t step, Size sz, void* )
{
vBinOp16<short, OpMin<short>, IF_SIMD(_VMin16s)>(src1, step1, src2, step2, dst, step, sz);
}
static void min32s( const int* src1, size_t step1,
const int* src2, size_t step2,
int* dst, size_t step, Size sz, void* )
{
vBinOp32s<OpMin<int>, IF_SIMD(_VMin32s)>(src1, step1, src2, step2, dst, step, sz);
}
static void min32f( const float* src1, size_t step1,
const float* src2, size_t step2,
float* dst, size_t step, Size sz, void* )
{
#if (ARITHM_USE_IPP == 1)
{
float* s1 = (float*)src1;
float* s2 = (float*)src2;
float* d = dst;
fixSteps(sz, sizeof(dst[0]), step1, step2, step);
for(int i = 0; i < sz.height; i++)
{
ippsMinEvery_32f(s1, s2, d, sz.width);
s1 = (float*)((uchar*)s1 + step1);
s2 = (float*)((uchar*)s2 + step2);
d = (float*)((uchar*)d + step);
}
}
#else
vBinOp32f<OpMin<float>, IF_SIMD(_VMin32f)>(src1, step1, src2, step2, dst, step, sz);
#endif
// IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
// ippiMinEvery_32f_C1R(src1, (int)step1, src2, (int)step2, dst, ippiSize(sz)),
// (vBinOp32f<OpMin<float>, IF_SIMD(_VMin32f)>(src1, step1, src2, step2, dst, step, sz)));
}
static void min64f( const double* src1, size_t step1,
const double* src2, size_t step2,
double* dst, size_t step, Size sz, void* )
{
vBinOp64f<OpMin<double>, IF_SIMD(_VMin64f)>(src1, step1, src2, step2, dst, step, sz);
}
static void absdiff8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAbsDiff_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz)),
(vBinOp8<uchar, OpAbsDiff<uchar>, IF_SIMD(_VAbsDiff8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void absdiff8s( const schar* src1, size_t step1,
const schar* src2, size_t step2,
schar* dst, size_t step, Size sz, void* )
{
vBinOp8<schar, OpAbsDiff<schar>, IF_SIMD(_VAbsDiff8s)>(src1, step1, src2, step2, dst, step, sz);
}
static void absdiff16u( const ushort* src1, size_t step1,
const ushort* src2, size_t step2,
ushort* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAbsDiff_16u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz)),
(vBinOp16<ushort, OpAbsDiff<ushort>, IF_SIMD(_VAbsDiff16u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void absdiff16s( const short* src1, size_t step1,
const short* src2, size_t step2,
short* dst, size_t step, Size sz, void* )
{
vBinOp16<short, OpAbsDiff<short>, IF_SIMD(_VAbsDiff16s)>(src1, step1, src2, step2, dst, step, sz);
}
static void absdiff32s( const int* src1, size_t step1,
const int* src2, size_t step2,
int* dst, size_t step, Size sz, void* )
{
vBinOp32s<OpAbsDiff<int>, IF_SIMD(_VAbsDiff32s)>(src1, step1, src2, step2, dst, step, sz);
}
static void absdiff32f( const float* src1, size_t step1,
const float* src2, size_t step2,
float* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAbsDiff_32f_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz)),
(vBinOp32f<OpAbsDiff<float>, IF_SIMD(_VAbsDiff32f)>(src1, step1, src2, step2, dst, step, sz)));
}
static void absdiff64f( const double* src1, size_t step1,
const double* src2, size_t step2,
double* dst, size_t step, Size sz, void* )
{
vBinOp64f<OpAbsDiff<double>, IF_SIMD(_VAbsDiff64f)>(src1, step1, src2, step2, dst, step, sz);
}
static void and8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiAnd_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz)),
(vBinOp8<uchar, OpAnd<uchar>, IF_SIMD(_VAnd8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void or8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiOr_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz)),
(vBinOp8<uchar, OpOr<uchar>, IF_SIMD(_VOr8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void xor8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step);
ippiXor_8u_C1R(src1, (int)step1, src2, (int)step2, dst, (int)step, ippiSize(sz)),
(vBinOp8<uchar, OpXor<uchar>, IF_SIMD(_VXor8u)>(src1, step1, src2, step2, dst, step, sz)));
}
static void not8u( const uchar* src1, size_t step1,
const uchar* src2, size_t step2,
uchar* dst, size_t step, Size sz, void* )
{
IF_IPP(fixSteps(sz, sizeof(dst[0]), step1, step2, step); (void)src2;
ippiNot_8u_C1R(src1, (int)step1, dst, (int)step, ippiSize(sz)),
(vBinOp8<uchar, OpNot<uchar>, IF_SIMD(_VNot8u)>(src1, step1, src2, step2, dst, step, sz)));
}
/****************************************************************************************\
* logical operations *
\****************************************************************************************/
void convertAndUnrollScalar( const Mat& sc, int buftype, uchar* scbuf, size_t blocksize )
{
int scn = (int)sc.total(), cn = CV_MAT_CN(buftype);
size_t esz = CV_ELEM_SIZE(buftype);
getConvertFunc(sc.depth(), buftype)(sc.data, 0, 0, 0, scbuf, 0, Size(std::min(cn, scn), 1), 0);
// unroll the scalar
if( scn < cn )
{
CV_Assert( scn == 1 );
size_t esz1 = CV_ELEM_SIZE1(buftype);
for( size_t i = esz1; i < esz; i++ )
scbuf[i] = scbuf[i - esz1];
}
for( size_t i = esz; i < blocksize*esz; i++ )
scbuf[i] = scbuf[i - esz];
}
static void binary_op(InputArray _src1, InputArray _src2, OutputArray _dst,
InputArray _mask, const BinaryFunc* tab, bool bitwise)
{
int kind1 = _src1.kind(), kind2 = _src2.kind();
Mat src1 = _src1.getMat(), src2 = _src2.getMat();
bool haveMask = !_mask.empty(), haveScalar = false;
BinaryFunc func;
int c;
if( src1.dims <= 2 && src2.dims <= 2 && kind1 == kind2 &&
src1.size() == src2.size() && src1.type() == src2.type() && !haveMask )
{
_dst.create(src1.size(), src1.type());
Mat dst = _dst.getMat();
if( bitwise )
{