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Upgrade V8 to 2.1.7
1 parent 6e603cc commit b35d72d

96 files changed

Lines changed: 107107 additions & 894 deletions

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deps/v8/ChangeLog

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,23 @@
1-
2010-03-17: Version 2.1.5
1+
2010-03-22: Version 2.1.7
2+
3+
Fixed issue 650.
4+
5+
Fixed a bug where __proto__ was sometimes enumerated (issue 646).
6+
7+
Performance improvements for arithmetic operations.
8+
9+
Performance improvements for string operations.
10+
11+
Print script name and line number information in stack trace.
12+
13+
14+
2010-03-17: Version 2.1.6
215

316
Performance improvements for arithmetic operations.
417

518
Performance improvements for string operations.
619

20+
721
2010-03-10: Version 2.1.4
822

923
Fixed code cache lookup for keyed IC's (issue http://crbug.com/37853).

deps/v8/src/SConscript

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,18 +43,21 @@ SOURCES = {
4343
bootstrapper.cc
4444
builtins.cc
4545
checks.cc
46+
circular-queue.cc
4647
code-stubs.cc
4748
codegen.cc
4849
compilation-cache.cc
4950
compiler.cc
5051
contexts.cc
5152
conversions.cc
5253
counters.cc
54+
cpu-profiler.cc
5355
data-flow.cc
5456
dateparser.cc
5557
debug-agent.cc
5658
debug.cc
5759
disassembler.cc
60+
diy-fp.cc
5861
execution.cc
5962
factory.cc
6063
flags.cc
@@ -63,6 +66,7 @@ SOURCES = {
6366
full-codegen.cc
6467
func-name-inferrer.cc
6568
global-handles.cc
69+
fast-dtoa.cc
6670
handles.cc
6771
hashmap.cc
6872
heap-profiler.cc

deps/v8/src/arm/assembler-arm-inl.h

Lines changed: 25 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -144,12 +144,21 @@ void RelocInfo::set_call_object(Object* target) {
144144

145145

146146
bool RelocInfo::IsPatchedReturnSequence() {
147-
// On ARM a "call instruction" is actually two instructions.
148-
// mov lr, pc
149-
// ldr pc, [pc, #XXX]
150-
return (Assembler::instr_at(pc_) == kMovLrPc)
151-
&& ((Assembler::instr_at(pc_ + Assembler::kInstrSize) & kLdrPCPattern)
152-
== kLdrPCPattern);
147+
Instr current_instr = Assembler::instr_at(pc_);
148+
Instr next_instr = Assembler::instr_at(pc_ + Assembler::kInstrSize);
149+
#ifdef USE_BLX
150+
// A patched return sequence is:
151+
// ldr ip, [pc, #0]
152+
// blx ip
153+
return ((current_instr & kLdrPCMask) == kLdrPCPattern)
154+
&& ((next_instr & kBlxRegMask) == kBlxRegPattern);
155+
#else
156+
// A patched return sequence is:
157+
// mov lr, pc
158+
// ldr pc, [pc, #-4]
159+
return (current_instr == kMovLrPc)
160+
&& ((next_instr & kLdrPCMask) == kLdrPCPattern);
161+
#endif
153162
}
154163

155164

@@ -225,6 +234,16 @@ Address Assembler::target_address_address_at(Address pc) {
225234
target_pc -= kInstrSize;
226235
instr = Memory::int32_at(target_pc);
227236
}
237+
238+
#ifdef USE_BLX
239+
// If we have a blx instruction, the instruction before it is
240+
// what needs to be patched.
241+
if ((instr & kBlxRegMask) == kBlxRegPattern) {
242+
target_pc -= kInstrSize;
243+
instr = Memory::int32_at(target_pc);
244+
}
245+
#endif
246+
228247
// Verify that the instruction to patch is a
229248
// ldr<cond> <Rd>, [pc +/- offset_12].
230249
ASSERT((instr & 0x0f7f0000) == 0x051f0000);

deps/v8/src/arm/assembler-arm.cc

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -240,8 +240,14 @@ static const Instr kPopRegPattern =
240240
al | B26 | L | 4 | PostIndex | sp.code() * B16;
241241
// mov lr, pc
242242
const Instr kMovLrPc = al | 13*B21 | pc.code() | lr.code() * B12;
243-
// ldr pc, [pc, #XXX]
244-
const Instr kLdrPCPattern = al | B26 | L | pc.code() * B16;
243+
// ldr rd, [pc, #offset]
244+
const Instr kLdrPCMask = CondMask | 15 * B24 | 7 * B20 | 15 * B16;
245+
const Instr kLdrPCPattern = al | 5 * B24 | L | pc.code() * B16;
246+
// blxcc rm
247+
const Instr kBlxRegMask =
248+
15 * B24 | 15 * B20 | 15 * B16 | 15 * B12 | 15 * B8 | 15 * B4;
249+
const Instr kBlxRegPattern =
250+
B24 | B21 | 15 * B16 | 15 * B12 | 15 * B8 | 3 * B4;
245251

246252
// Spare buffer.
247253
static const int kMinimalBufferSize = 4*KB;

deps/v8/src/arm/assembler-arm.h

Lines changed: 27 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -509,7 +509,10 @@ typedef int32_t Instr;
509509

510510

511511
extern const Instr kMovLrPc;
512+
extern const Instr kLdrPCMask;
512513
extern const Instr kLdrPCPattern;
514+
extern const Instr kBlxRegMask;
515+
extern const Instr kBlxRegPattern;
513516

514517

515518
class Assembler : public Malloced {
@@ -590,12 +593,34 @@ class Assembler : public Malloced {
590593
static const int kInstrSize = sizeof(Instr);
591594

592595
// Distance between the instruction referring to the address of the call
593-
// target (ldr pc, [target addr in const pool]) and the return address
596+
// target and the return address.
597+
#ifdef USE_BLX
598+
// Call sequence is:
599+
// ldr ip, [pc, #...] @ call address
600+
// blx ip
601+
// @ return address
602+
static const int kCallTargetAddressOffset = 2 * kInstrSize;
603+
#else
604+
// Call sequence is:
605+
// mov lr, pc
606+
// ldr pc, [pc, #...] @ call address
607+
// @ return address
594608
static const int kCallTargetAddressOffset = kInstrSize;
609+
#endif
595610

596611
// Distance between start of patched return sequence and the emitted address
597612
// to jump to.
598-
static const int kPatchReturnSequenceAddressOffset = kInstrSize;
613+
#ifdef USE_BLX
614+
// Return sequence is:
615+
// ldr ip, [pc, #0] @ emited address and start
616+
// blx ip
617+
static const int kPatchReturnSequenceAddressOffset = 0 * kInstrSize;
618+
#else
619+
// Return sequence is:
620+
// mov lr, pc @ start of sequence
621+
// ldr pc, [pc, #-4] @ emited address
622+
static const int kPatchReturnSequenceAddressOffset = kInstrSize;
623+
#endif
599624

600625
// Difference between address of current opcode and value read from pc
601626
// register.

deps/v8/src/arm/constants-arm.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,11 @@
7272
# define CAN_USE_THUMB_INSTRUCTIONS 1
7373
#endif
7474

75+
// Using blx may yield better code, so use it when required or when available
76+
#if defined(USE_THUMB_INTERWORK) || defined(CAN_USE_ARMV5_INSTRUCTIONS)
77+
#define USE_BLX 1
78+
#endif
79+
7580
namespace assembler {
7681
namespace arm {
7782

deps/v8/src/arm/debug-arm.cc

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,13 +46,23 @@ void BreakLocationIterator::SetDebugBreakAtReturn() {
4646
// add sp, sp, #4
4747
// bx lr
4848
// to a call to the debug break return code.
49+
// #if USE_BLX
50+
// ldr ip, [pc, #0]
51+
// blx ip
52+
// #else
4953
// mov lr, pc
5054
// ldr pc, [pc, #-4]
55+
// #endif
5156
// <debug break return code entry point address>
5257
// bktp 0
5358
CodePatcher patcher(rinfo()->pc(), 4);
59+
#ifdef USE_BLX
60+
patcher.masm()->ldr(v8::internal::ip, MemOperand(v8::internal::pc, 0));
61+
patcher.masm()->blx(v8::internal::ip);
62+
#else
5463
patcher.masm()->mov(v8::internal::lr, v8::internal::pc);
5564
patcher.masm()->ldr(v8::internal::pc, MemOperand(v8::internal::pc, -4));
65+
#endif
5666
patcher.Emit(Debug::debug_break_return()->entry());
5767
patcher.masm()->bkpt(0);
5868
}

deps/v8/src/arm/macro-assembler-arm.cc

Lines changed: 22 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -58,11 +58,6 @@ MacroAssembler::MacroAssembler(void* buffer, int size)
5858
#endif
5959

6060

61-
// Using blx may yield better code, so use it when required or when available
62-
#if defined(USE_THUMB_INTERWORK) || defined(CAN_USE_ARMV5_INSTRUCTIONS)
63-
#define USE_BLX 1
64-
#endif
65-
6661
// Using bx does not yield better code, so use it only when required
6762
#if defined(USE_THUMB_INTERWORK)
6863
#define USE_BX 1
@@ -117,16 +112,33 @@ void MacroAssembler::Call(Register target, Condition cond) {
117112

118113
void MacroAssembler::Call(intptr_t target, RelocInfo::Mode rmode,
119114
Condition cond) {
115+
#if USE_BLX
116+
// On ARMv5 and after the recommended call sequence is:
117+
// ldr ip, [pc, #...]
118+
// blx ip
119+
120+
// The two instructions (ldr and blx) could be separated by a literal
121+
// pool and the code would still work. The issue comes from the
122+
// patching code which expect the ldr to be just above the blx.
123+
BlockConstPoolFor(2);
124+
// Statement positions are expected to be recorded when the target
125+
// address is loaded. The mov method will automatically record
126+
// positions when pc is the target, since this is not the case here
127+
// we have to do it explicitly.
128+
WriteRecordedPositions();
129+
130+
mov(ip, Operand(target, rmode), LeaveCC, cond);
131+
blx(ip, cond);
132+
133+
ASSERT(kCallTargetAddressOffset == 2 * kInstrSize);
134+
#else
120135
// Set lr for return at current pc + 8.
121136
mov(lr, Operand(pc), LeaveCC, cond);
122137
// Emit a ldr<cond> pc, [pc + offset of target in constant pool].
123138
mov(pc, Operand(target, rmode), LeaveCC, cond);
124-
// If USE_BLX is defined, we could emit a 'mov ip, target', followed by a
125-
// 'blx ip'; however, the code would not be shorter than the above sequence
126-
// and the target address of the call would be referenced by the first
127-
// instruction rather than the second one, which would make it harder to patch
128-
// (two instructions before the return address, instead of one).
139+
129140
ASSERT(kCallTargetAddressOffset == kInstrSize);
141+
#endif
130142
}
131143

132144

deps/v8/src/arm/macro-assembler-arm.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -415,7 +415,7 @@ class MacroAssembler: public Assembler {
415415
Register object2,
416416
Register scratch1,
417417
Register scratch2,
418-
Label *failure);
418+
Label* failure);
419419

420420
// Checks if both objects are sequential ASCII strings and jumps to label
421421
// if either is not.

deps/v8/src/arm/regexp-macro-assembler-arm.cc

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -648,16 +648,17 @@ Handle<Object> RegExpMacroAssemblerARM::GetCode(Handle<String> source) {
648648
__ ldr(r0, MemOperand(frame_pointer(), kInputStart));
649649
// Find negative length (offset of start relative to end).
650650
__ sub(current_input_offset(), r0, end_of_input_address());
651-
// Set r0 to address of char before start of input
651+
// Set r0 to address of char before start of the input string
652652
// (effectively string position -1).
653+
__ ldr(r1, MemOperand(frame_pointer(), kStartIndex));
653654
__ sub(r0, current_input_offset(), Operand(char_size()));
655+
__ sub(r0, r0, Operand(r1, LSL, (mode_ == UC16) ? 1 : 0));
654656
// Store this value in a local variable, for use when clearing
655657
// position registers.
656658
__ str(r0, MemOperand(frame_pointer(), kInputStartMinusOne));
657659

658660
// Determine whether the start index is zero, that is at the start of the
659661
// string, and store that value in a local variable.
660-
__ ldr(r1, MemOperand(frame_pointer(), kStartIndex));
661662
__ tst(r1, Operand(r1));
662663
__ mov(r1, Operand(1), LeaveCC, eq);
663664
__ mov(r1, Operand(0), LeaveCC, ne);
@@ -700,12 +701,15 @@ Handle<Object> RegExpMacroAssemblerARM::GetCode(Handle<String> source) {
700701
// copy captures to output
701702
__ ldr(r1, MemOperand(frame_pointer(), kInputStart));
702703
__ ldr(r0, MemOperand(frame_pointer(), kRegisterOutput));
704+
__ ldr(r2, MemOperand(frame_pointer(), kStartIndex));
703705
__ sub(r1, end_of_input_address(), r1);
704706
// r1 is length of input in bytes.
705707
if (mode_ == UC16) {
706708
__ mov(r1, Operand(r1, LSR, 1));
707709
}
708710
// r1 is length of input in characters.
711+
__ add(r1, r1, Operand(r2));
712+
// r1 is length of string in characters.
709713

710714
ASSERT_EQ(0, num_saved_registers_ % 2);
711715
// Always an even number of capture registers. This allows us to

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