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stm32: Add support for FDCAN on the STM32N6.#19316

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kwagyeman wants to merge 2 commits into
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kwagyeman:kwabena/add_n6_can
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stm32: Add support for FDCAN on the STM32N6.#19316
kwagyeman wants to merge 2 commits into
micropython:masterfrom
kwagyeman:kwabena/add_n6_can

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@kwagyeman

@kwagyeman kwagyeman commented Jun 6, 2026

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Adds support for CAN on the STM32N6 and enables it on the OpenMV N6.

Tested transmit and receive at 500Kb/s, and both are working.

@kwagyeman

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@dpgeorge

@kwagyeman kwagyeman changed the title Kwabena/add n6 can stm32: Add support for FDCAN on the STM32N6. Jun 6, 2026
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github-actions Bot commented Jun 6, 2026

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Code size report:

Reference:  samd/mphalport: Run events at least once in mp_hal_delay_ms. [af38ee1]
Comparison: stm32/boards/OPENMV_N6: Enable FDCAN on the OpenMV N6. [merge of 2b33e15]
  mpy-cross:    +0 +0.000% 
   bare-arm:    +0 +0.000% 
minimal x86:    +0 +0.000% 
   unix x64:    +0 +0.000% standard
      stm32:    +0 +0.000% PYBV10
      esp32:    +0 +0.000% ESP32_GENERIC
     mimxrt:    +0 +0.000% TEENSY40
        rp2:    +0 +0.000% RPI_PICO_W
       samd:    +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS
  qemu rv32:    +0 +0.000% VIRT_RV32

kwagyeman added 2 commits June 8, 2026 15:49
Signed-off-by: Kwabena W. Agyeman <kwagyeman@live.com>
Signed-off-by: Kwabena W. Agyeman <kwagyeman@live.com>

@dpgeorge dpgeorge left a comment

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Thanks for the PR.

It doesn't build for me, I had to make the following change:

--- a/ports/stm32/Makefile
+++ b/ports/stm32/Makefile
@@ -421,7 +421,7 @@ endif

 ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),f0 f4 f7))
 HAL_SRC_C += $(addprefix $(STM32LIB_HAL_BASE)/Src/stm32$(MCU_SERIES)xx_, hal_can.c)
-else ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),g0 g4 h7))
+else ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),g0 g4 h7 n6))
 HAL_SRC_C += $(addprefix $(STM32LIB_HAL_BASE)/Src/stm32$(MCU_SERIES)xx_, hal_fdcan.c)
 else ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),l4))
 HAL_SRC_C += $(addprefix $(STM32LIB_HAL_BASE)/Src/Legacy/stm32$(MCU_SERIES)xx_, hal_can.c)

Also, something is wrong with loopback mode, and filtering. The tests/ports/stm32/pyb_can.py test should pass and run on OPENMV_N6 with this change, but it does not:

  • it takes a long time to run, it seems to hit a timeout on send/recv
  • the filtering part of the test doesn't work, it doesn't ever receive anything

Do you want me to look into that?

// #define MICROPY_HW_CAN3_NAME "FDCAN3"
// #define MICROPY_HW_CAN3_TX (pyb_pin_CAN3_TXFD)
// #define MICROPY_HW_CAN3_RX (pyb_pin_CAN3_RXFD)
#define MICROPY_HW_CAN_IS_RESERVED(id) ((id != PYB_CAN_1) && (id != PYB_CAN_3))

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Can this be (id == PYB_CAN_2) to simplify it?

But, also, can this line just be removed because CAN2 isn't enabled. Reserved is when the peripheral is configured but used internally and not for user use.

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Yes, please change as required.

UART4_RX,PA11
UART4_TX,PA12
CAN1_RXFD,PA11
CAN1_TXFD,PA12

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How about calling these CAN1_RX and CAN1_TX to match the new alt-func names?

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I don't have an opinion on it other than making it compile.

@dpgeorge

dpgeorge commented Jun 9, 2026

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Note: to run tests/ports/stm32/pyb_can.py on this board you need to replace pyb.delay with time.sleep_ms.

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@dpgeorge - Can you take over this PR and fix it? I was just trying to get it working for a customer. I don't know how to properly test it.

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dpgeorge commented Jun 9, 2026

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Can you take over this PR and fix it?

Yes!

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Investigating the failures here, one thing it needed was LL_APB1_GRP2_EnableClockLowPower(LL_APB1_GRP2_PERIPH_FDCAN);.

I'm still working on it...

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