rp2: Add RP2350 PIO v1 assembler support.#18975
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rp2: Add RP2350 PIO v1 assembler support.#18975bikeNomad wants to merge 6 commits intomicropython:masterfrom
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This was referenced Mar 21, 2026
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Add support for new PIO v1 instruction features on RP2350: - wait: add jmp_pin source (PINCTRL_JMP_PIN, src=3) with a 2-bit offset argument. - irq: add next_pio/prev_pio index modifiers for cross-PIO IRQ targeting. - asm_pio: add in_count parameter encoding SHIFTCTRL.IN_COUNT (bits [4:0]) to mask unneeded IN-mapped pins to zero. - asm_pio: fix fifo_join encoding to support RP2350 TXGET(4), TXPUT(8) and PUTGET(12) modes via SHIFTCTRL bits [15:14]. All changes are backward-compatible with RP2040 PIO v0. Tested on RPI_PICO2 hardware: 26/26 encoding tests passed, covering new instructions, RP2350 FIFO join modes, in_count, and regression checks for all existing instruction encodings. Also update RP2 docs to cover new changes. Signed-off-by: NED KONZ <NED@METAMAGIX.TECH>
Signed-off-by: NED KONZ <NED@METAMAGIX.TECH>
Add RP2350-specific support to the PIO C layer: - PIO.version(): returns PIO hardware version (0=RP2040, 1=RP2350). - PIO.JOIN_RX_GET and PIO.JOIN_RX_PUT constants for new FJOIN FIFO modes (fifo_join values 4 and 8, encoding SHIFTCTRL bits 14/15). - StateMachine.init() in_count kwarg: overrides SHIFTCTRL IN_COUNT bits [4:0] at runtime, guarded by PICO_RP2350. - PIO.sm_mask_enable(sm_mask, next_mask, prev_mask): atomically enables SMs on this and neighbouring PIOs via CTRL NEXT/PREV_PIO_MASK and NEXTPREV_SM_ENABLE bits. - StateMachine.putget(index[, value]): direct host read/write access to rxf_putget[sm][n] registers for FJOIN_RX_PUT/GET modes. The IRQ handler (pio_irq0) requires no change: RP2350 ints0 for IRQ0 still covers only SM0-3, identical layout to RP2040. Signed-off-by: NED KONZ <NED@METAMAGIX.TECH>
Add documentation for the new RP2350-specific PIO C layer features: - PIO.version(): returns PIO hardware version (0=RP2040, 1=RP2350). - PIO.JOIN_RX_PUT / PIO.JOIN_RX_GET: new FIFO join mode constants, with explanation of access direction (SM writes/host reads vs host writes/SM reads). - PIO.sm_mask_enable(): atomic cross-PIO SM enable via CTRL NEXT/PREV_PIO_MASK bits, with example. - StateMachine.init(): add in_count kwarg (RP2350 SHIFTCTRL IN_COUNT). - StateMachine.putget(): direct RXF_PUTGET register access, with FIFO join mode direction semantics explained and a usage example. Also update StateMachine class description and constructor to mention RP2350 and its 12 state machines. Signed-off-by: NED KONZ <NED@METAMAGIX.TECH>
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Signed-off-by: NED KONZ <NED@METAMAGIX.TECH>
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If you call rp2.StateMachine.init() with pull_thresh=32 it will overwrite the FJOIN_TX bit in the SMx_SHIFTCTRL register. This PR fixes that issue. Signed-off-by: Ned Konz <ned@metamagix.tech>
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Includes #18625 |
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Add support for new PIO v1 instruction features on RP2350:
2-bit offset argument.
targeting.
(bits [4:0]) to mask unneeded IN-mapped pins to zero.
TXPUT(8) and PUTGET(12) modes via SHIFTCTRL bits [15:14].
All changes are backward-compatible with RP2040 PIO v0.
Also update RP2 docs to cover new changes.
Signed-off-by: NED KONZ NED@METAMAGIX.TECH
Summary
The RP2350 added a number of improvements to the PIO hardware in the RP2040.
This PR is the first of three that will bring MicroPython's RP2 PIO support up to date.
Testing
Tested on a RPI_PICO2 board using #18974: all encoding tests passed,
covering new instructions, RP2350 FIFO join modes, in_count,
and regression checks for all existing instruction encodings.
I also tested on a RPI_PICO board and there were no regressions.
Generative AI
I used generative AI tools when creating this PR, but a human has checked the
code and is responsible for the code and the description above.