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Pull request overview
This pull request adds convenient bitfield accessors for processor flags registers across x86 (amd64/i386) and ARM (aarch64) architectures. The implementation allows both raw value manipulation and individual flag access through attribute-style syntax, improving the debugging experience when working with processor state.
Key Changes
- Added
BitfieldRegisterAccessorbase class providing integer-like behavior with named bitfield access - Implemented architecture-specific accessor classes (
X86FlagsAccessorandArmPstateAccessor) with all documented flags - Integrated accessors into register holders for all supported architectures (amd64, i386, i386-over-amd64, aarch64)
Reviewed changes
Copilot reviewed 9 out of 10 changed files in this pull request and generated 1 comment.
Show a summary per file
| File | Description |
|---|---|
libdebug/architectures/shared/flags_accessor.py |
Core implementation of bitfield accessor infrastructure with base class and architecture-specific implementations |
libdebug/architectures/amd64/amd64_ptrace_register_holder.py |
Integration of x86 flags accessor for amd64 eflags register |
libdebug/architectures/i386/i386_ptrace_register_holder.py |
Integration of x86 flags accessor for i386 eflags register |
libdebug/architectures/amd64/compat/i386_over_amd64_ptrace_register_holder.py |
Integration for i386 compatibility mode on amd64 |
libdebug/architectures/aarch64/aarch64_ptrace_register_holder.py |
Integration of ARM pstate accessor for aarch64 |
libdebug/utils/pprint_primitives.py |
Enhanced type handling to support accessor objects in register pretty-printing |
libdebug/snapshots/snapshot.py |
Updated register snapshot logic to handle accessor types (contains a bug) |
test/scripts/register_test.py |
Comprehensive test coverage for all three architectures with flag manipulation scenarios |
newsfragments/290.improvement.md |
Changelog entry documenting the new feature |
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| d.regs.eflags = 0x202 | ||
| d.regs.eflags.CF = 1 | ||
| d.regs.eflags.IOPL = 0b01 | ||
| d.regs.eflags.ZF = False # accepts booleans or ints |
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How can a user understand which fields support booleans and which do not? Flag size? I'm not fully convinced
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I mean, the way I did it, every field supports bool, what's wrong?
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My concern is that there are fields that are 2 bits long, which cannot be properly set using True or False, since this would always set the MSB to zero. I’m not sure whether this is something we really care about (it might just be a user error), but it could still cause some confusion. Maybe they do not expect the MSB to be zeroed. Should we be more explicit in the documentation and pydoc?
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If we want to go that way, we should probably restrict write access to only the flags that are actually modifiable/accessible. If you do that, I think that only 1-bit flags remain available for writing.
Like, I believe that IOPL which is 2-bit is read only.
The problem with doing that is that some arm flags might actually be available depending on kernel parameters, so to have a 100% accurate arm pstate we would need to detect which flags are actually available at runtime, and only then expose them.
I think this looks a bit better now
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Pull request overview
Copilot reviewed 10 out of 11 changed files in this pull request and generated 5 comments.
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