static const RegisterID dataTempRegister = ARMRegisters::ip;

static const RegisterID addressTempRegister = ARMRegisters::r6;

static const ARMRegisters::FPDoubleRegisterID fpTempRegister = ARMRegisters::d7;

inline ARMRegisters::FPSingleRegisterID fpTempRegisterAsSingle() { return ARMRegisters::asSingle(fpTempRegister); }

MacroAssemblerARMv7()

: m_makeJumpPatchable(false)

{

}

typedef ARMv7Assembler::LinkRecord LinkRecord;

typedef ARMv7Assembler::JumpType JumpType;

typedef ARMv7Assembler::JumpLinkType JumpLinkType;

typedef ARMv7Assembler::Condition Condition;

static const ARMv7Assembler::Condition DefaultCondition = ARMv7Assembler::ConditionInvalid;

static const ARMv7Assembler::JumpType DefaultJump = ARMv7Assembler::JumpNoConditionFixedSize;

static bool isCompactPtrAlignedAddressOffset(ptrdiff_t value)

{

return value >= -255 && value <= 255;

}

Vector<LinkRecord, 0, UnsafeVectorOverflow>& jumpsToLink() { return m_assembler.jumpsToLink(); }

void* unlinkedCode() { return m_assembler.unlinkedCode(); }

static bool canCompact(JumpType jumpType) { return ARMv7Assembler::canCompact(jumpType); }

static JumpLinkType computeJumpType(JumpType jumpType, const uint8_t* from, const uint8_t* to) { return ARMv7Assembler::computeJumpType(jumpType, from, to); }

static JumpLinkType computeJumpType(LinkRecord& record, const uint8_t* from, const uint8_t* to) { return ARMv7Assembler::computeJumpType(record, from, to); }

static int jumpSizeDelta(JumpType jumpType, JumpLinkType jumpLinkType) { return ARMv7Assembler::jumpSizeDelta(jumpType, jumpLinkType); }

static void link(LinkRecord& record, uint8_t* from, uint8_t* to) { return ARMv7Assembler::link(record, from, to); }

struct ArmAddress {

enum AddressType {

HasOffset,

HasIndex,

} type;

RegisterID base;

union {

int32_t offset;

struct {

RegisterID index;

Scale scale;

};

} u;

explicit ArmAddress(RegisterID base, int32_t offset = 0)

: type(HasOffset)

, base(base)

{

u.offset = offset;

}

explicit ArmAddress(RegisterID base, RegisterID index, Scale scale = TimesOne)

: type(HasIndex)

, base(base)

{

u.index = index;

u.scale = scale;

}

};

static const Scale ScalePtr = TimesFour;

enum RelationalCondition {

Equal = ARMv7Assembler::ConditionEQ,

NotEqual = ARMv7Assembler::ConditionNE,

Above = ARMv7Assembler::ConditionHI,

AboveOrEqual = ARMv7Assembler::ConditionHS,

Below = ARMv7Assembler::ConditionLO,

BelowOrEqual = ARMv7Assembler::ConditionLS,

GreaterThan = ARMv7Assembler::ConditionGT,

GreaterThanOrEqual = ARMv7Assembler::ConditionGE,

LessThan = ARMv7Assembler::ConditionLT,

LessThanOrEqual = ARMv7Assembler::ConditionLE

};

enum ResultCondition {

Overflow = ARMv7Assembler::ConditionVS,

Signed = ARMv7Assembler::ConditionMI,

PositiveOrZero = ARMv7Assembler::ConditionPL,

Zero = ARMv7Assembler::ConditionEQ,

NonZero = ARMv7Assembler::ConditionNE

};

enum DoubleCondition {

// These conditions will only evaluate to true if the comparison is ordered - i.e. neither operand is NaN.

DoubleEqual = ARMv7Assembler::ConditionEQ,

DoubleNotEqual = ARMv7Assembler::ConditionVC, // Not the right flag! check for this & handle differently.

DoubleGreaterThan = ARMv7Assembler::ConditionGT,

DoubleGreaterThanOrEqual = ARMv7Assembler::ConditionGE,

DoubleLessThan = ARMv7Assembler::ConditionLO,

DoubleLessThanOrEqual = ARMv7Assembler::ConditionLS,

// If either operand is NaN, these conditions always evaluate to true.

DoubleEqualOrUnordered = ARMv7Assembler::ConditionVS, // Not the right flag! check for this & handle differently.

DoubleNotEqualOrUnordered = ARMv7Assembler::ConditionNE,

DoubleGreaterThanOrUnordered = ARMv7Assembler::ConditionHI,

DoubleGreaterThanOrEqualOrUnordered = ARMv7Assembler::ConditionHS,

DoubleLessThanOrUnordered = ARMv7Assembler::ConditionLT,

DoubleLessThanOrEqualOrUnordered = ARMv7Assembler::ConditionLE,

};

static const RegisterID stackPointerRegister = ARMRegisters::sp;

static const RegisterID framePointerRegister = ARMRegisters::fp;

static const RegisterID linkRegister = ARMRegisters::lr;

// Integer arithmetic operations:

//

// Operations are typically two operand - operation(source, srcDst)

// For many operations the source may be an TrustedImm32, the srcDst operand

// may often be a memory location (explictly described using an Address

// object).

void add32(RegisterID src, RegisterID dest)

{

m_assembler.add(dest, dest, src);

}

void add32(RegisterID left, RegisterID right, RegisterID dest)

{

m_assembler.add(dest, left, right);

}

void add32(TrustedImm32 imm, RegisterID dest)

{

add32(imm, dest, dest);

}

void add32(AbsoluteAddress src, RegisterID dest)

{

load32(src.m_ptr, dataTempRegister);

add32(dataTempRegister, dest);

}

void add32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);

// For adds with stack pointer destination, moving the src first to sp is

// needed to avoid unpredictable instruction

if (dest == ARMRegisters::sp && src != dest) {

move(src, ARMRegisters::sp);

src = ARMRegisters::sp;

}

if (armImm.isValid())

m_assembler.add(dest, src, armImm);

else {

move(imm, dataTempRegister);

m_assembler.add(dest, src, dataTempRegister);

}

}

void add32(TrustedImm32 imm, Address address)

{

load32(address, dataTempRegister);

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);

if (armImm.isValid())

m_assembler.add(dataTempRegister, dataTempRegister, armImm);

else {

// Hrrrm, since dataTempRegister holds the data loaded,

// use addressTempRegister to hold the immediate.

move(imm, addressTempRegister);

m_assembler.add(dataTempRegister, dataTempRegister, addressTempRegister);

}

store32(dataTempRegister, address);

}

void add32(Address src, RegisterID dest)

{

load32(src, dataTempRegister);

add32(dataTempRegister, dest);

}

void add32(TrustedImm32 imm, AbsoluteAddress address)

{

load32(address.m_ptr, dataTempRegister);

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);

if (armImm.isValid())

m_assembler.add(dataTempRegister, dataTempRegister, armImm);

else {

// Hrrrm, since dataTempRegister holds the data loaded,

// use addressTempRegister to hold the immediate.

move(imm, addressTempRegister);

m_assembler.add(dataTempRegister, dataTempRegister, addressTempRegister);

}

store32(dataTempRegister, address.m_ptr);

}

void addPtrNoFlags(TrustedImm32 imm, RegisterID srcDest)

{

add32(imm, srcDest);

}

void add64(TrustedImm32 imm, AbsoluteAddress address)

{

move(TrustedImmPtr(address.m_ptr), addressTempRegister);

m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(0));

ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);

if (armImm.isValid())

m_assembler.add_S(dataTempRegister, dataTempRegister, armImm);

else {

move(imm, addressTempRegister);

m_assembler.add_S(dataTempRegister, dataTempRegister, addressTempRegister);

move(TrustedImmPtr(address.m_ptr), addressTempRegister);

}

m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(0));

m_assembler.ldr(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(4));

m_assembler.adc(dataTempRegister, dataTempRegister, ARMThumbImmediate::makeEncodedImm(imm.m_value >> 31));

m_assembler.str(dataTempRegister, addressTempRegister, ARMThumbImmediate::makeUInt12(4));

}

void and32(RegisterID op1, RegisterID op2, RegisterID dest)

{

m_assembler.ARM_and(dest, op1, op2);

}

void and32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);

if (armImm.isValid())

m_assembler.ARM_and(dest, src, armImm);

else {

move(imm, dataTempRegister);

m_assembler.ARM_and(dest, src, dataTempRegister);

}

}

void and32(RegisterID src, RegisterID dest)

{

and32(dest, src, dest);

}

void and32(TrustedImm32 imm, RegisterID dest)

{

and32(imm, dest, dest);

}

void and32(Address src, RegisterID dest)

{

load32(src, dataTempRegister);

and32(dataTempRegister, dest);

}

void countLeadingZeros32(RegisterID src, RegisterID dest)

{

m_assembler.clz(dest, src);

}

void lshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)

{

// Clamp the shift to the range 0..31

ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);

ASSERT(armImm.isValid());

m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);

m_assembler.lsl(dest, src, dataTempRegister);

}

void lshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)

{

m_assembler.lsl(dest, src, imm.m_value & 0x1f);

}

void lshift32(RegisterID shiftAmount, RegisterID dest)

{

lshift32(dest, shiftAmount, dest);

}

void lshift32(TrustedImm32 imm, RegisterID dest)

{

lshift32(dest, imm, dest);

}

void mul32(RegisterID src, RegisterID dest)

{

m_assembler.smull(dest, dataTempRegister, dest, src);

}

void mul32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

move(imm, dataTempRegister);

m_assembler.smull(dest, dataTempRegister, src, dataTempRegister);

}

void neg32(RegisterID srcDest)

{

m_assembler.neg(srcDest, srcDest);

}

void or32(RegisterID src, RegisterID dest)

{

m_assembler.orr(dest, dest, src);

}

void or32(RegisterID src, AbsoluteAddress dest)

{

move(TrustedImmPtr(dest.m_ptr), addressTempRegister);

load32(addressTempRegister, dataTempRegister);

or32(src, dataTempRegister);

store32(dataTempRegister, addressTempRegister);

}

void or32(TrustedImm32 imm, AbsoluteAddress address)

{

ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);

if (armImm.isValid()) {

move(TrustedImmPtr(address.m_ptr), addressTempRegister);

load32(addressTempRegister, dataTempRegister);

m_assembler.orr(dataTempRegister, dataTempRegister, armImm);

store32(dataTempRegister, addressTempRegister);

} else {

move(TrustedImmPtr(address.m_ptr), addressTempRegister);

load32(addressTempRegister, dataTempRegister);

move(imm, addressTempRegister);

m_assembler.orr(dataTempRegister, dataTempRegister, addressTempRegister);

move(TrustedImmPtr(address.m_ptr), addressTempRegister);

store32(dataTempRegister, addressTempRegister);

}

}

void or32(TrustedImm32 imm, Address address)

{

load32(address, dataTempRegister);

or32(imm, dataTempRegister, dataTempRegister);

store32(dataTempRegister, address);

}

void or32(TrustedImm32 imm, RegisterID dest)

{

or32(imm, dest, dest);

}

void or32(RegisterID op1, RegisterID op2, RegisterID dest)

{

m_assembler.orr(dest, op1, op2);

}

void or32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);

if (armImm.isValid())

m_assembler.orr(dest, src, armImm);

else {

ASSERT(src != dataTempRegister);

move(imm, dataTempRegister);

m_assembler.orr(dest, src, dataTempRegister);

}

}

void rshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)

{

// Clamp the shift to the range 0..31

ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);

ASSERT(armImm.isValid());

m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);

m_assembler.asr(dest, src, dataTempRegister);

}

void rshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)

{

if (!imm.m_value)

move(src, dest);

else

m_assembler.asr(dest, src, imm.m_value & 0x1f);

}

void rshift32(RegisterID shiftAmount, RegisterID dest)

{

rshift32(dest, shiftAmount, dest);

}

void rshift32(TrustedImm32 imm, RegisterID dest)

{

rshift32(dest, imm, dest);

}

void urshift32(RegisterID src, RegisterID shiftAmount, RegisterID dest)

{

// Clamp the shift to the range 0..31

ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(0x1f);

ASSERT(armImm.isValid());

m_assembler.ARM_and(dataTempRegister, shiftAmount, armImm);

m_assembler.lsr(dest, src, dataTempRegister);

}

void urshift32(RegisterID src, TrustedImm32 imm, RegisterID dest)

{

if (!imm.m_value)

move(src, dest);

else

m_assembler.lsr(dest, src, imm.m_value & 0x1f);

}

void urshift32(RegisterID shiftAmount, RegisterID dest)

{

urshift32(dest, shiftAmount, dest);

}

void urshift32(TrustedImm32 imm, RegisterID dest)

{

urshift32(dest, imm, dest);

}

void sub32(RegisterID src, RegisterID dest)

{

m_assembler.sub(dest, dest, src);

}

void sub32(TrustedImm32 imm, RegisterID dest)

{

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);

if (armImm.isValid())

m_assembler.sub(dest, dest, armImm);

else {

move(imm, dataTempRegister);

m_assembler.sub(dest, dest, dataTempRegister);

}

}

void sub32(TrustedImm32 imm, Address address)

{

load32(address, dataTempRegister);

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);

if (armImm.isValid())

m_assembler.sub(dataTempRegister, dataTempRegister, armImm);

else {

// Hrrrm, since dataTempRegister holds the data loaded,

// use addressTempRegister to hold the immediate.

move(imm, addressTempRegister);

m_assembler.sub(dataTempRegister, dataTempRegister, addressTempRegister);

}

store32(dataTempRegister, address);

}

void sub32(Address src, RegisterID dest)

{

load32(src, dataTempRegister);

sub32(dataTempRegister, dest);

}

void sub32(TrustedImm32 imm, AbsoluteAddress address)

{

load32(address.m_ptr, dataTempRegister);

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12OrEncodedImm(imm.m_value);

if (armImm.isValid())

m_assembler.sub(dataTempRegister, dataTempRegister, armImm);

else {

// Hrrrm, since dataTempRegister holds the data loaded,

// use addressTempRegister to hold the immediate.

move(imm, addressTempRegister);

m_assembler.sub(dataTempRegister, dataTempRegister, addressTempRegister);

}

store32(dataTempRegister, address.m_ptr);

}

void xor32(RegisterID op1, RegisterID op2, RegisterID dest)

{

m_assembler.eor(dest, op1, op2);

}

void xor32(TrustedImm32 imm, RegisterID src, RegisterID dest)

{

if (imm.m_value == -1) {

m_assembler.mvn(dest, src);

return;

}

ARMThumbImmediate armImm = ARMThumbImmediate::makeEncodedImm(imm.m_value);

if (armImm.isValid())

m_assembler.eor(dest, src, armImm);

else {

move(imm, dataTempRegister);

m_assembler.eor(dest, src, dataTempRegister);

}

}

void xor32(RegisterID src, RegisterID dest)

{

xor32(dest, src, dest);

}

void xor32(TrustedImm32 imm, RegisterID dest)

{

if (imm.m_value == -1)

m_assembler.mvn(dest, dest);

else

xor32(imm, dest, dest);

}

// Memory access operations:

//

// Loads are of the form load(address, destination) and stores of the form

// store(source, address). The source for a store may be an TrustedImm32. Address

// operand objects to loads and store will be implicitly constructed if a

// register is passed.

void load32(ArmAddress address, RegisterID dest)

{

if (address.type == ArmAddress::HasIndex)

m_assembler.ldr(dest, address.base, address.u.index, address.u.scale);

else if (address.u.offset >= 0) {

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);

ASSERT(armImm.isValid());

m_assembler.ldr(dest, address.base, armImm);

} else {

ASSERT(address.u.offset >= -255);

m_assembler.ldr(dest, address.base, address.u.offset, true, false);

}

}

void load16(ArmAddress address, RegisterID dest)

{

if (address.type == ArmAddress::HasIndex)

m_assembler.ldrh(dest, address.base, address.u.index, address.u.scale);

else if (address.u.offset >= 0) {

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);

ASSERT(armImm.isValid());

m_assembler.ldrh(dest, address.base, armImm);

} else {

ASSERT(address.u.offset >= -255);

m_assembler.ldrh(dest, address.base, address.u.offset, true, false);

}

}

void load16SignedExtendTo32(ArmAddress address, RegisterID dest)

{

ASSERT(address.type == ArmAddress::HasIndex);

m_assembler.ldrsh(dest, address.base, address.u.index, address.u.scale);

}

void load8(ArmAddress address, RegisterID dest)

{

if (address.type == ArmAddress::HasIndex)

m_assembler.ldrb(dest, address.base, address.u.index, address.u.scale);

else if (address.u.offset >= 0) {

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);

ASSERT(armImm.isValid());

m_assembler.ldrb(dest, address.base, armImm);

} else {

ASSERT(address.u.offset >= -255);

m_assembler.ldrb(dest, address.base, address.u.offset, true, false);

}

}

void load8SignedExtendTo32(ArmAddress address, RegisterID dest)

{

ASSERT(address.type == ArmAddress::HasIndex);

m_assembler.ldrsb(dest, address.base, address.u.index, address.u.scale);

}

void store32(RegisterID src, ArmAddress address)

{

if (address.type == ArmAddress::HasIndex)

m_assembler.str(src, address.base, address.u.index, address.u.scale);

else if (address.u.offset >= 0) {

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);

ASSERT(armImm.isValid());

m_assembler.str(src, address.base, armImm);

} else {

ASSERT(address.u.offset >= -255);

m_assembler.str(src, address.base, address.u.offset, true, false);

}

}

void store8(RegisterID src, ArmAddress address)

{

if (address.type == ArmAddress::HasIndex)

m_assembler.strb(src, address.base, address.u.index, address.u.scale);

else if (address.u.offset >= 0) {

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);

ASSERT(armImm.isValid());

m_assembler.strb(src, address.base, armImm);

} else {

ASSERT(address.u.offset >= -255);

m_assembler.strb(src, address.base, address.u.offset, true, false);

}

}

void store16(RegisterID src, ArmAddress address)

{

if (address.type == ArmAddress::HasIndex)

m_assembler.strh(src, address.base, address.u.index, address.u.scale);

else if (address.u.offset >= 0) {

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.u.offset);

ASSERT(armImm.isValid());

m_assembler.strh(src, address.base, armImm);

} else {

ASSERT(address.u.offset >= -255);

m_assembler.strh(src, address.base, address.u.offset, true, false);

}

}

void load32(ImplicitAddress address, RegisterID dest)

{

load32(setupArmAddress(address), dest);

}

void load32(BaseIndex address, RegisterID dest)

{

load32(setupArmAddress(address), dest);

}

void load32WithUnalignedHalfWords(BaseIndex address, RegisterID dest)

{

load32(setupArmAddress(address), dest);

}

void load16Unaligned(BaseIndex address, RegisterID dest)

{

load16(setupArmAddress(address), dest);

}

void load32(const void* address, RegisterID dest)

{

move(TrustedImmPtr(address), addressTempRegister);

m_assembler.ldr(dest, addressTempRegister, ARMThumbImmediate::makeUInt16(0));

}

void abortWithReason(AbortReason reason)

{

move(TrustedImm32(reason), dataTempRegister);

breakpoint();

}

void abortWithReason(AbortReason reason, intptr_t misc)

{

move(TrustedImm32(misc), addressTempRegister);

abortWithReason(reason);

}

ConvertibleLoadLabel convertibleLoadPtr(Address address, RegisterID dest)

{

ConvertibleLoadLabel result(this);

ASSERT(address.offset >= 0 && address.offset <= 255);

m_assembler.ldrWide8BitImmediate(dest, address.base, address.offset);

return result;

}

void load8(ImplicitAddress address, RegisterID dest)

{

load8(setupArmAddress(address), dest);

}

void load8SignedExtendTo32(ImplicitAddress, RegisterID)

{

UNREACHABLE_FOR_PLATFORM();

}

void load8(BaseIndex address, RegisterID dest)

{

load8(setupArmAddress(address), dest);

}

void load8SignedExtendTo32(BaseIndex address, RegisterID dest)

{

load8SignedExtendTo32(setupArmAddress(address), dest);

}

void load8(const void* address, RegisterID dest)

{

move(TrustedImmPtr(address), dest);

load8(dest, dest);

}

DataLabel32 load32WithAddressOffsetPatch(Address address, RegisterID dest)

{

DataLabel32 label = moveWithPatch(TrustedImm32(address.offset), dataTempRegister);

load32(ArmAddress(address.base, dataTempRegister), dest);

return label;

}

DataLabelCompact load32WithCompactAddressOffsetPatch(Address address, RegisterID dest)

{

padBeforePatch();

RegisterID base = address.base;

DataLabelCompact label(this);

ASSERT(isCompactPtrAlignedAddressOffset(address.offset));

m_assembler.ldr(dest, base, address.offset, true, false);

return label;

}

void load16(BaseIndex address, RegisterID dest)

{

m_assembler.ldrh(dest, makeBaseIndexBase(address), address.index, address.scale);

}

void load16SignedExtendTo32(BaseIndex address, RegisterID dest)

{

load16SignedExtendTo32(setupArmAddress(address), dest);

}

void load16(ImplicitAddress address, RegisterID dest)

{

ARMThumbImmediate armImm = ARMThumbImmediate::makeUInt12(address.offset);

if (armImm.isValid())

m_assembler.ldrh(dest, address.base, armImm);

else {

move(TrustedImm32(address.offset), dataTempRegister);

m_assembler.ldrh(dest, address.base, dataTempRegister);

}

}

void load16SignedExtendTo32(ImplicitAddress, RegisterID)

{

UNREACHABLE_FOR_PLATFORM();

}

DataLabel32 store32WithAddressOffsetPatch(RegisterID src, Address address)

{

DataLabel32 label = moveWithPatch(TrustedImm32(address.offset), dataTempRegister);

store32(src, ArmAddress(address.base, dataTempRegister));

return label;

}

void store32(RegisterID src, ImplicitAddress address)

{

store32(src, setupArmAddress(address));

}

void store32(RegisterID src, BaseIndex address)

{

store32(src, setupArmAddress(address));

}

void store32(TrustedImm32 imm, ImplicitAddress address)

{

move(imm, dataTempRegister);

store32(dataTempRegister, setupArmAddress(address));

}

void store32(TrustedImm32 imm, BaseIndex address)

{

move(imm, dataTempRegister);

store32(dataTempRegister, setupArmAddress(address));

}

void store32(RegisterID src, const void* address)

{

move(TrustedImmPtr(address), addressTempRegister);

m_assembler.str(src, addressTempRegister, ARMThumbImmediate::makeUInt16(0));

}

void store32(TrustedImm32 imm, const void* address)

{

move(imm, dataTempRegister);

store32(dataTempRegister, address);

}

void store8(RegisterID src, Address address)

{

store8(src, setupArmAddress(address));

}

void store8(RegisterID src, BaseIndex address)

{

store8(src, setupArmAddress(address));

}

void store8(RegisterID src, void* address)

{

move(TrustedImmPtr(address), addressTempRegister);

store8(src, ArmAddress(addressTempRegister, 0));

}

void store8(TrustedImm32 imm, void* address)

{

move(imm, dataTempRegister);

store8(dataTempRegister, address);

}

void store8(TrustedImm32 imm, Address address)

{

move(imm, dataTempRegister);

store8(dataTempRegister, address);

}

void store16(RegisterID src, BaseIndex address)

{

store16(src, setupArmAddress(address));

}

// Possibly clobbers src, but not on this architecture.

void moveDoubleToInts(FPRegisterID src, RegisterID dest1, RegisterID dest2)

{

m_assembler.vmov(dest1, dest2, src);

}

void moveIntsToDouble(RegisterID src1, RegisterID src2, FPRegisterID dest, FPRegisterID scratch)

{

UNUSED_PARAM(scratch);

m_assembler.vmov(dest, src1, src2);

}

static bool shouldBlindForSpecificArch(uint32_t value)

{

ARMThumbImmediate immediate = ARMThumbImmediate::makeEncodedImm(value);

// Couldn't be encoded as an immediate, so assume it's untrusted.

if (!immediate.isValid())

return true;

// If we can encode the immediate, we have less than 16 attacker

// controlled bits.

if (immediate.isEncodedImm())

return false;

// Don't let any more than 12 bits of an instruction word

// be controlled by an attacker.

return !immediate.isUInt12();

}

// Floating-point operations:

static bool supportsFloatingPoint() { return true; }

static bool supportsFloatingPointTruncate() { return true; }

static bool supportsFloatingPointSqrt() { return true; }

static bool supportsFloatingPointAbs() { return true; }

static bool supportsFloatingPointRounding() { return false; }

void loadDouble(ImplicitAddress address, FPRegisterID dest)

{

RegisterID base = address.base;

int32_t offset = address.offset;

// Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.

if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {

add32(TrustedImm32(offset), base, addressTempRegister);

base = addressTempRegister;

offset = 0;

}

m_assembler.vldr(dest, base, offset);

}

void loadFloat(ImplicitAddress address, FPRegisterID dest)

{

RegisterID base = address.base;

int32_t offset = address.offset;

// Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.

if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {

add32(TrustedImm32(offset), base, addressTempRegister);

base = addressTempRegister;

offset = 0;

}

m_assembler.flds(ARMRegisters::asSingle(dest), base, offset);

}

void loadDouble(BaseIndex address, FPRegisterID dest)

{

move(address.index, addressTempRegister);

lshift32(TrustedImm32(address.scale), addressTempRegister);

add32(address.base, addressTempRegister);

loadDouble(Address(addressTempRegister, address.offset), dest);

}

void loadFloat(BaseIndex address, FPRegisterID dest)

{

move(address.index, addressTempRegister);

lshift32(TrustedImm32(address.scale), addressTempRegister);

add32(address.base, addressTempRegister);

loadFloat(Address(addressTempRegister, address.offset), dest);

}

void moveDouble(FPRegisterID src, FPRegisterID dest)

{

if (src != dest)

m_assembler.vmov(dest, src);

}

void moveZeroToDouble(FPRegisterID reg)

{

static double zeroConstant = 0.;

loadDouble(TrustedImmPtr(&zeroConstant), reg);

}

void loadDouble(TrustedImmPtr address, FPRegisterID dest)

{

move(address, addressTempRegister);

m_assembler.vldr(dest, addressTempRegister, 0);

}

void storeDouble(FPRegisterID src, ImplicitAddress address)

{

RegisterID base = address.base;

int32_t offset = address.offset;

// Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.

if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {

add32(TrustedImm32(offset), base, addressTempRegister);

base = addressTempRegister;

offset = 0;

}

m_assembler.vstr(src, base, offset);

}

void storeFloat(FPRegisterID src, ImplicitAddress address)

{

RegisterID base = address.base;

int32_t offset = address.offset;

// Arm vfp addresses can be offset by a 9-bit ones-comp immediate, left shifted by 2.

if ((offset & 3) || (offset > (255 * 4)) || (offset < -(255 * 4))) {

add32(TrustedImm32(offset), base, addressTempRegister);

base = addressTempRegister;

offset = 0;

}

m_assembler.fsts(ARMRegisters::asSingle(src), base, offset);

}

void storeDouble(FPRegisterID src, TrustedImmPtr address)

{

move(address, addressTempRegister);

storeDouble(src, addressTempRegister);

}

void storeDouble(FPRegisterID src, BaseIndex address)

{

move(address.index, addressTempRegister);

lshift32(TrustedImm32(address.scale), addressTempRegister);

add32(address.base, addressTempRegister);

storeDouble(src, Address(addressTempRegister, address.offset));

}

void storeFloat(FPRegisterID src, BaseIndex address)

{

move(address.index, addressTempRegister);

lshift32(TrustedImm32(address.scale), addressTempRegister);

add32(address.base, addressTempRegister);

storeFloat(src, Address(addressTempRegister, address.offset));

}

void addDouble(FPRegisterID src, FPRegisterID dest)

{

m_assembler.vadd(dest, dest, src);

}