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basic/architectures: sort by name and remove duplicates
C.f. 086df29.
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‎src/basic/architecture.c‎

Lines changed: 76 additions & 79 deletions
Original file line numberDiff line numberDiff line change
@@ -9,114 +9,111 @@
99

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int uname_architecture(void) {
1111

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/* Return a sanitized enum identifying the architecture we are
13-
* running on. This is based on uname(), and the user may
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* hence control what this returns by using
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* personality(). This puts the user in control on systems
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* that can run binaries of multiple architectures.
12+
/* Return a sanitized enum identifying the architecture we are running on. This
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* is based on uname(), and the user may hence control what this returns by using
14+
* personality(). This puts the user in control on systems that can run binaries
15+
* of multiple architectures.
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*
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* We do not translate the string returned by uname()
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* 1:1. Instead we try to clean it up and break down the
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* confusion on x86 and arm in particular.
17+
* We do not translate the string returned by uname() 1:1. Instead we try to
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* clean it up and break down the confusion on x86 and arm in particular.
2119
*
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* We do not try to distinguish CPUs not CPU features, but
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* actual architectures, i.e. that have genuinely different
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* code. */
20+
* We try to distinguish CPUs, not CPU features, i.e. actual architectures that
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* have genuinely different code. */
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2623
static const struct {
2724
const char *machine;
2825
int arch;
2926
} arch_map[] = {
30-
#if defined(__x86_64__) || defined(__i386__)
27+
#if defined(__aarch64__) || defined(__arm__)
28+
{ "aarch64", ARCHITECTURE_ARM64 },
29+
{ "aarch64_be", ARCHITECTURE_ARM64_BE },
30+
{ "armv8l", ARCHITECTURE_ARM },
31+
{ "armv8b", ARCHITECTURE_ARM_BE },
32+
{ "armv7ml", ARCHITECTURE_ARM },
33+
{ "armv7mb", ARCHITECTURE_ARM_BE },
34+
{ "armv7l", ARCHITECTURE_ARM },
35+
{ "armv7b", ARCHITECTURE_ARM_BE },
36+
{ "armv6l", ARCHITECTURE_ARM },
37+
{ "armv6b", ARCHITECTURE_ARM_BE },
38+
{ "armv5tl", ARCHITECTURE_ARM },
39+
{ "armv5tel", ARCHITECTURE_ARM },
40+
{ "armv5tejl", ARCHITECTURE_ARM },
41+
{ "armv5tejb", ARCHITECTURE_ARM_BE },
42+
{ "armv5teb", ARCHITECTURE_ARM_BE },
43+
{ "armv5tb", ARCHITECTURE_ARM_BE },
44+
{ "armv4tl", ARCHITECTURE_ARM },
45+
{ "armv4tb", ARCHITECTURE_ARM_BE },
46+
{ "armv4l", ARCHITECTURE_ARM },
47+
{ "armv4b", ARCHITECTURE_ARM_BE },
48+
49+
#elif defined(__alpha__)
50+
{ "alpha" , ARCHITECTURE_ALPHA },
51+
52+
#elif defined(__arc__)
53+
{ "arc", ARCHITECTURE_ARC },
54+
{ "arceb", ARCHITECTURE_ARC_BE },
55+
56+
#elif defined(__cris__)
57+
{ "crisv32", ARCHITECTURE_CRIS },
58+
59+
#elif defined(__i386__) || defined(__x86_64__)
3160
{ "x86_64", ARCHITECTURE_X86_64 },
3261
{ "i686", ARCHITECTURE_X86 },
3362
{ "i586", ARCHITECTURE_X86 },
3463
{ "i486", ARCHITECTURE_X86 },
3564
{ "i386", ARCHITECTURE_X86 },
36-
#elif defined(__powerpc__) || defined(__powerpc64__)
37-
{ "ppc64", ARCHITECTURE_PPC64 },
38-
{ "ppc64le", ARCHITECTURE_PPC64_LE },
39-
{ "ppc", ARCHITECTURE_PPC },
40-
{ "ppcle", ARCHITECTURE_PPC_LE },
65+
4166
#elif defined(__ia64__)
4267
{ "ia64", ARCHITECTURE_IA64 },
68+
4369
#elif defined(__hppa__) || defined(__hppa64__)
4470
{ "parisc64", ARCHITECTURE_PARISC64 },
4571
{ "parisc", ARCHITECTURE_PARISC },
46-
#elif defined(__s390__) || defined(__s390x__)
47-
{ "s390x", ARCHITECTURE_S390X },
48-
{ "s390", ARCHITECTURE_S390 },
49-
#elif defined(__sparc__)
50-
{ "sparc64", ARCHITECTURE_SPARC64 },
51-
{ "sparc", ARCHITECTURE_SPARC },
72+
73+
#elif defined(__m68k__)
74+
{ "m68k", ARCHITECTURE_M68K },
75+
5276
#elif defined(__mips__) || defined(__mips64__)
5377
{ "mips64", ARCHITECTURE_MIPS64 },
5478
{ "mips", ARCHITECTURE_MIPS },
55-
#elif defined(__alpha__)
56-
{ "alpha" , ARCHITECTURE_ALPHA },
57-
#elif defined(__arm__) || defined(__aarch64__)
58-
{ "aarch64", ARCHITECTURE_ARM64 },
59-
{ "aarch64_be", ARCHITECTURE_ARM64_BE },
60-
{ "armv4l", ARCHITECTURE_ARM },
61-
{ "armv4b", ARCHITECTURE_ARM_BE },
62-
{ "armv4tl", ARCHITECTURE_ARM },
63-
{ "armv4tb", ARCHITECTURE_ARM_BE },
64-
{ "armv5tl", ARCHITECTURE_ARM },
65-
{ "armv5tb", ARCHITECTURE_ARM_BE },
66-
{ "armv5tel", ARCHITECTURE_ARM },
67-
{ "armv5teb" , ARCHITECTURE_ARM_BE },
68-
{ "armv5tejl", ARCHITECTURE_ARM },
69-
{ "armv5tejb", ARCHITECTURE_ARM_BE },
70-
{ "armv6l", ARCHITECTURE_ARM },
71-
{ "armv6b", ARCHITECTURE_ARM_BE },
72-
{ "armv7l", ARCHITECTURE_ARM },
73-
{ "armv7b", ARCHITECTURE_ARM_BE },
74-
{ "armv7ml", ARCHITECTURE_ARM },
75-
{ "armv7mb", ARCHITECTURE_ARM_BE },
76-
{ "armv4l", ARCHITECTURE_ARM },
77-
{ "armv4b", ARCHITECTURE_ARM_BE },
78-
{ "armv4tl", ARCHITECTURE_ARM },
79-
{ "armv4tb", ARCHITECTURE_ARM_BE },
80-
{ "armv5tl", ARCHITECTURE_ARM },
81-
{ "armv5tb", ARCHITECTURE_ARM_BE },
82-
{ "armv5tel", ARCHITECTURE_ARM },
83-
{ "armv5teb", ARCHITECTURE_ARM_BE },
84-
{ "armv5tejl", ARCHITECTURE_ARM },
85-
{ "armv5tejb", ARCHITECTURE_ARM_BE },
86-
{ "armv6l", ARCHITECTURE_ARM },
87-
{ "armv6b", ARCHITECTURE_ARM_BE },
88-
{ "armv7l", ARCHITECTURE_ARM },
89-
{ "armv7b", ARCHITECTURE_ARM_BE },
90-
{ "armv7ml", ARCHITECTURE_ARM },
91-
{ "armv7mb", ARCHITECTURE_ARM_BE },
92-
{ "armv8l", ARCHITECTURE_ARM },
93-
{ "armv8b", ARCHITECTURE_ARM_BE },
94-
#elif defined(__sh__) || defined(__sh64__)
95-
{ "sh5", ARCHITECTURE_SH64 },
96-
{ "sh2", ARCHITECTURE_SH },
97-
{ "sh2a", ARCHITECTURE_SH },
98-
{ "sh3", ARCHITECTURE_SH },
99-
{ "sh4", ARCHITECTURE_SH },
100-
{ "sh4a", ARCHITECTURE_SH },
101-
#elif defined(__m68k__)
102-
{ "m68k", ARCHITECTURE_M68K },
103-
#elif defined(__tilegx__)
104-
{ "tilegx", ARCHITECTURE_TILEGX },
105-
#elif defined(__cris__)
106-
{ "crisv32", ARCHITECTURE_CRIS },
79+
10780
#elif defined(__nios2__)
10881
{ "nios2", ARCHITECTURE_NIOS2 },
82+
83+
#elif defined(__powerpc__) || defined(__powerpc64__)
84+
{ "ppc64le", ARCHITECTURE_PPC64_LE },
85+
{ "ppc64", ARCHITECTURE_PPC64 },
86+
{ "ppcle", ARCHITECTURE_PPC_LE },
87+
{ "ppc", ARCHITECTURE_PPC },
88+
10989
#elif defined(__riscv)
110-
{ "riscv32", ARCHITECTURE_RISCV32 },
11190
{ "riscv64", ARCHITECTURE_RISCV64 },
91+
{ "riscv32", ARCHITECTURE_RISCV32 },
11292
# if __SIZEOF_POINTER__ == 4
11393
{ "riscv", ARCHITECTURE_RISCV32 },
11494
# elif __SIZEOF_POINTER__ == 8
11595
{ "riscv", ARCHITECTURE_RISCV64 },
11696
# endif
117-
#elif defined(__arc__)
118-
{ "arc", ARCHITECTURE_ARC },
119-
{ "arceb", ARCHITECTURE_ARC_BE },
97+
98+
#elif defined(__s390__) || defined(__s390x__)
99+
{ "s390x", ARCHITECTURE_S390X },
100+
{ "s390", ARCHITECTURE_S390 },
101+
102+
#elif defined(__sh__) || defined(__sh64__)
103+
{ "sh5", ARCHITECTURE_SH64 },
104+
{ "sh4a", ARCHITECTURE_SH },
105+
{ "sh4", ARCHITECTURE_SH },
106+
{ "sh3", ARCHITECTURE_SH },
107+
{ "sh2a", ARCHITECTURE_SH },
108+
{ "sh2", ARCHITECTURE_SH },
109+
110+
#elif defined(__sparc__)
111+
{ "sparc64", ARCHITECTURE_SPARC64 },
112+
{ "sparc", ARCHITECTURE_SPARC },
113+
114+
#elif defined(__tilegx__)
115+
{ "tilegx", ARCHITECTURE_TILEGX },
116+
120117
#else
121118
# error "Please register your architecture here!"
122119
#endif

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