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Commits on Jun 28, 2023

• [JSC] Add Air OptimizePairedLoadStore phase

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Commits on Jun 20, 2023

• Implement relaxed SIMD madd and nmadd instructions

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  danlliu

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  Justin Michaud

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Commits on Jun 15, 2023

• [JSC] Drop Imm64 in Air and extend ARM64 Imm

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Commits on Jun 13, 2023

• Implemented SIMD trunc instructions.

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  danlliu

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  Justin Michaud

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• [JSC] ARM64 double comparison should use fcmp_0 when it is done with 0.0

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• [JSC] Optimize DFG ArithMul

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Commits on Jun 12, 2023

• Implemented relaxed_swizzle SIMD opcode.

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  danlliu

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  Justin Michaud

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Commits on Jun 9, 2023

• [JSC] Add Imm64 concept to ARM64 Air

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Commits on Jun 8, 2023

• B3 Select instruction truncates vector operands

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Commits on May 24, 2023

• [JSC] Use commitInternal instead of m_locked.add in B3LowerToAir.cpp

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Commits on May 22, 2023

• [JSC] Use ARM64 ubfiz for Shl(ZExt32(Trunc(value)), Imm)

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Commits on May 20, 2023

• [JSC] Use ZeroReg for store8 / store16 in ARM64 B3/Air

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Commits on Mar 27, 2023

• Unreviewed, reverting r262116@main.

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Commits on Mar 25, 2023

• Unreviewed, reverting r262068@main.

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Commits on Mar 24, 2023

• DFG should support tuples

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Commits on Mar 18, 2023

• [JSC] Use ZeroReg more in B3

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• [JSC] Optimize VectorShr/VectorShl on ARM64

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Commits on Mar 14, 2023

• [JSC] Add signExtend8To64 / signExtend16To64

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Commits on Mar 4, 2023

• [JSC] VectorExtractLane+0 for f32x4 / f64x2 is nop

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Commits on Feb 22, 2023

• Reduce size of code emitted for stack loads/stores from Air on ARM

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Commits on Feb 17, 2023

• VectorBitwiseSelect should not create tricky IR to colour

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  Justin Michaud

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Commits on Feb 14, 2023

• [JSC] Introduce VectorMulByElement

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Commits on Feb 13, 2023

• [JSC] Vector operations should work with CSE

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• [JSC] Use VectorLoadXSplat in B3

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Commits on Jan 27, 2023

• [JSC] VectorSwizzle should be optimized to DupElement when possible

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Commits on Jan 25, 2023

• Improve VectorShuffle on arm

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Commits on Jan 5, 2023

• [JSC] Add runtime configuration for AirOpcode table

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Commits on Dec 23, 2022

• [WebAssembly SIMD] Get WasmB3IRGenerator to parity on Intel

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  ddegazio

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• SIMD values should be saved during OSR entry.

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  Justin Michaud

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• Make MacroAssemblerARMv7 scratch regs available to Air

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  aoikonomopoulos

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Commits on Dec 22, 2022

• [JSC] Add "AddZeroExtend64" Air opcode

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Commits on Dec 15, 2022

• [JSC] Use VectorSplatFloat32 / VectorSplatFloat64 on ARM64

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• [JSC] Materialize Const128 as MemoryValue

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Commits on Dec 14, 2022

• [SIMD] B3/OMG Support

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  Justin Michaud

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Commits on Dec 8, 2022

• [SIMD] SIMD functions should support Linear Scan and Graph Colouring register allocators.

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  Justin Michaud

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