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dpgeorgedpgeorge
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py/asmthumb: Add wide ldr to handle larger offsets.
In particular this allows native functions on Thumb2 to index more than 32 constants in the constant table.
1 parent d95947b commit 07ccb19

2 files changed

Lines changed: 19 additions & 3 deletions

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‎py/asmthumb.c‎

Lines changed: 16 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,13 +36,17 @@
3636
#include "py/mphal.h"
3737
#include "py/asmthumb.h"
3838

39+
#define UNSIGNED_FIT5(x) ((uint32_t)(x) < 32)
3940
#define UNSIGNED_FIT8(x) (((x) & 0xffffff00) == 0)
4041
#define UNSIGNED_FIT16(x) (((x) & 0xffff0000) == 0)
4142
#define SIGNED_FIT8(x) (((x) & 0xffffff80) == 0) || (((x) & 0xffffff80) == 0xffffff80)
4243
#define SIGNED_FIT9(x) (((x) & 0xffffff00) == 0) || (((x) & 0xffffff00) == 0xffffff00)
4344
#define SIGNED_FIT12(x) (((x) & 0xfffff800) == 0) || (((x) & 0xfffff800) == 0xfffff800)
4445
#define SIGNED_FIT23(x) (((x) & 0xffc00000) == 0) || (((x) & 0xffc00000) == 0xffc00000)
4546

47+
#define OP_LDR_W_HI(reg_base) (0xf8d0 | (reg_base))
48+
#define OP_LDR_W_LO(reg_dest, imm12) ((reg_dest) << 12 | (imm12))
49+
4650
static inline byte *asm_thumb_get_cur_to_write_bytes(asm_thumb_t *as, int n) {
4751
return mp_asm_base_get_cur_to_write_bytes(&as->base, n);
4852
}
@@ -304,6 +308,18 @@ void asm_thumb_mov_reg_pcrel(asm_thumb_t *as, uint rlo_dest, uint label) {
304308
asm_thumb_add_reg_reg(as, rlo_dest, ASM_THUMB_REG_R15); // 2 bytes
305309
}
306310

311+
static inline void asm_thumb_ldr_reg_reg_i12(asm_thumb_t *as, uint reg_dest, uint reg_base, uint word_offset) {
312+
asm_thumb_op32(as, OP_LDR_W_HI(reg_base), OP_LDR_W_LO(reg_dest, word_offset * 4));
313+
}
314+
315+
void asm_thumb_ldr_reg_reg_i12_optimised(asm_thumb_t *as, uint reg_dest, uint reg_base, uint word_offset) {
316+
if (reg_dest < ASM_THUMB_REG_R8 && reg_base < ASM_THUMB_REG_R8 && UNSIGNED_FIT5(word_offset)) {
317+
asm_thumb_ldr_rlo_rlo_i5(as, reg_dest, reg_base, word_offset);
318+
} else {
319+
asm_thumb_ldr_reg_reg_i12(as, reg_dest, reg_base, word_offset);
320+
}
321+
}
322+
307323
// this could be wrong, because it should have a range of +/- 16MiB...
308324
#define OP_BW_HI(byte_offset) (0xf000 | (((byte_offset) >> 12) & 0x07ff))
309325
#define OP_BW_LO(byte_offset) (0xb800 | (((byte_offset) >> 1) & 0x07ff))
@@ -347,8 +363,6 @@ void asm_thumb_bcc_label(asm_thumb_t *as, int cond, uint label) {
347363
}
348364

349365
#define OP_BLX(reg) (0x4780 | ((reg) << 3))
350-
#define OP_LDR_W_HI(reg_base) (0xf8d0 | (reg_base))
351-
#define OP_LDR_W_LO(reg_dest, imm12) ((reg_dest) << 12 | (imm12))
352366
#define OP_SVC(arg) (0xdf00 | (arg))
353367

354368
void asm_thumb_bl_ind(asm_thumb_t *as, void *fun_ptr, uint fun_id, uint reg_temp) {

‎py/asmthumb.h‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -254,6 +254,8 @@ void asm_thumb_mov_reg_local(asm_thumb_t *as, uint rlo_dest, int local_num); //
254254
void asm_thumb_mov_reg_local_addr(asm_thumb_t *as, uint rlo_dest, int local_num); // convenience
255255
void asm_thumb_mov_reg_pcrel(asm_thumb_t *as, uint rlo_dest, uint label);
256256

257+
void asm_thumb_ldr_reg_reg_i12_optimised(asm_thumb_t *as, uint reg_dest, uint reg_base, uint byte_offset); // convenience
258+
257259
void asm_thumb_b_label(asm_thumb_t *as, uint label); // convenience: picks narrow or wide branch
258260
void asm_thumb_bcc_label(asm_thumb_t *as, int cc, uint label); // convenience: picks narrow or wide branch
259261
void asm_thumb_bl_ind(asm_thumb_t *as, void *fun_ptr, uint fun_id, uint reg_temp); // convenience
@@ -322,7 +324,7 @@ void asm_thumb_bl_ind(asm_thumb_t *as, void *fun_ptr, uint fun_id, uint reg_temp
322324
#define ASM_MUL_REG_REG(as, reg_dest, reg_src) asm_thumb_format_4((as), ASM_THUMB_FORMAT_4_MUL, (reg_dest), (reg_src))
323325

324326
#define ASM_LOAD_REG_REG(as, reg_dest, reg_base) asm_thumb_ldr_rlo_rlo_i5((as), (reg_dest), (reg_base), 0)
325-
#define ASM_LOAD_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_thumb_ldr_rlo_rlo_i5((as), (reg_dest), (reg_base), (word_offset))
327+
#define ASM_LOAD_REG_REG_OFFSET(as, reg_dest, reg_base, word_offset) asm_thumb_ldr_reg_reg_i12_optimised((as), (reg_dest), (reg_base), (word_offset))
326328
#define ASM_LOAD8_REG_REG(as, reg_dest, reg_base) asm_thumb_ldrb_rlo_rlo_i5((as), (reg_dest), (reg_base), 0)
327329
#define ASM_LOAD16_REG_REG(as, reg_dest, reg_base) asm_thumb_ldrh_rlo_rlo_i5((as), (reg_dest), (reg_base), 0)
328330
#define ASM_LOAD32_REG_REG(as, reg_dest, reg_base) asm_thumb_ldr_rlo_rlo_i5((as), (reg_dest), (reg_base), 0)

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