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Commits on Mar 14, 2026

• [JSC] Implement SIMD Shuffle reduction

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  Constellation

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Commits on May 3, 2025

• Start adopting C++20's [[likely]] / [[unlikely]] in JSC

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  cdumez

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Commits on Oct 30, 2024

• Added skip markers for JavaScriptCore and WebCore files that do not conform to -Wunsafe-buffer-usage

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Commits on Sep 16, 2024

• Treat ColdCCals as CCals on ARMv7

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  aoikonomopoulos

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  justinmichaud

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Commits on Aug 29, 2024

• [ARMv7] Support running testb3

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  jjgriego

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  justinmichaud

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Commits on Apr 20, 2024

• Reduce use of `const char*`

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  cdumez

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Commits on Oct 9, 2023

• WebAssembly SIMD results in incorrect float values and non working bitwise operations

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  Justin Michaud

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Commits on Jun 26, 2023

• [JSC] Use dup-and-ins instead of ins-and-ins to construct SIMD vector

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  Constellation

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Commits on Mar 27, 2023

• Unreviewed, reverting r262116@main.

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  webkit-commit-queue

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  fujii

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Commits on Mar 25, 2023

• Unreviewed, reverting r262068@main.

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  webkit-commit-queue

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  fujii

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Commits on Mar 24, 2023

• DFG should support tuples

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  kmiller68

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Commits on Feb 22, 2023

• [JSC] Fix SIMD in new BBQ

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  Constellation

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Commits on Jan 25, 2023

• Improve VectorShuffle on arm

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  justinmichaud

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  Constellation

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Commits on Dec 23, 2022

• [WebAssembly SIMD] Get WasmB3IRGenerator to parity on Intel

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  ddegazio

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  Constellation

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Commits on Dec 19, 2022

• [WebAssembly SIMD] Emulate 8-bit shift instructions and i8x16.popcnt on Intel

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  ddegazio

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Commits on Dec 14, 2022

• [WebAssembly SIMD] Support floating-point absolute value, negate, min, max, and square-root on Intel

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  ddegazio

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Commits on Dec 13, 2022

• [JSC] Port and enable Wasm BBQ JIT on ARMv7

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  jjgriego

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  Justin Michaud

  committed
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• [WebAssembly SIMD] Emulate vector floating-point absolute value on Intel

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  ddegazio

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Commits on Dec 9, 2022

• [WebAssembly SIMD] Support bitwise operations on Intel

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  ddegazio

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Commits on Dec 8, 2022

• [SIMD] SIMD functions should support Linear Scan and Graph Colouring register allocators.

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  Justin Michaud

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Commits on Dec 7, 2022

• [WebAssembly SIMD] Support integer and floating-point arithmetic on Intel

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  ddegazio

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Commits on Oct 28, 2022

• [SIMD] Add SIMD opcodes and spec tests

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  justinmichaud

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  Justin Michaud

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Commits on Oct 24, 2022

• Support v128 const load store and extract lane in bbq only with O0 register allocation

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  justinmichaud

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  Justin Michaud

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Commits on May 15, 2020

• [IWYU] Remove unnecessary includes from JSC implementation files

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  rkirsling

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Commits on Aug 2, 2019

• B3 should support tuple types

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  kmiller68

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Commits on May 19, 2017

• B3::Value::effects() says that having a fence range implies the fence bit, but on x86_64 we lower loadAcq/storeRel to load/store so the store-before-load fence bit orderings won't be honored

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  Filip Pizlo

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Commits on May 9, 2017

• testWasmBoundsCheck and testCallFunctionWithHellaArguments is broken in testb3

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  saambarati

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Commits on Apr 4, 2017

• Air::lowerAfterRegAlloc should bail early if it finds no Shuffles or ColdCCalls

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  Filip Pizlo

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Commits on Mar 26, 2017

• Air::Liveness shouldn't need HashSets

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  Filip Pizlo

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Commits on Feb 24, 2017

• Move Arg::Type and Arg::Width out into the B3 namespace, since they are general concepts

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  Filip Pizlo

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Commits on Sep 30, 2016

• Air should have a way of expressing additional instruction flags

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  Filip Pizlo

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Commits on Jan 15, 2016

• Air needs a Shuffle instruction

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  Filip Pizlo

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• Unreviewed, rolling out r195084.

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  webkit-commit-queue

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• Air needs a Shuffle instruction

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  Filip Pizlo

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