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InPlaceInterpreter64.asm
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11594 lines (10255 loc) · 319 KB
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# Copyright (C) 2023-2025 Apple Inc. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
#
# THIS SOFTWARE IS PROVIDED BY APPLE INC. AND ITS CONTRIBUTORS ``AS IS''
# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR ITS CONTRIBUTORS
# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
# THE POSSIBILITY OF SUCH DAMAGE.
# Callee save
macro saveIPIntRegisters()
# NOTE: We intentionally don't restore pinned wasm registers here. These are saved
# and restored when entering Wasm by the JSToWasm wrapper and changes to them are meant
# to be observable within the same Wasm module.
subp IPIntCalleeSaveSpaceStackAligned, sp
if ARM64 or ARM64E
storepairq MC, PC, -2 * SlotSize[cfr]
elsif X86_64 or RISCV64
storep PC, -1 * SlotSize[cfr]
storep MC, -2 * SlotSize[cfr]
end
end
macro restoreIPIntRegisters()
# NOTE: We intentionally don't restore pinned wasm registers here. These are saved
# and restored when entering Wasm by the JSToWasm wrapper and changes to them are meant
# to be observable within the same Wasm module.
if ARM64 or ARM64E
loadpairq -2 * SlotSize[cfr], MC, PC
elsif X86_64 or RISCV64
loadp -1 * SlotSize[cfr], PC
loadp -2 * SlotSize[cfr], MC
end
addp IPIntCalleeSaveSpaceStackAligned, sp
end
# Dispatch target bases
if ARM64 or ARM64E or X86_64
const ipint_dispatch_base = _ipint_unreachable
end
if ARM64 or ARM64E
const ipint_gc_dispatch_base = _ipint_struct_new
const ipint_conversion_dispatch_base = _ipint_i32_trunc_sat_f32_s
const ipint_simd_dispatch_base = _ipint_simd_v128_load_mem
const ipint_atomic_dispatch_base = _ipint_memory_atomic_notify
end
# Tail-call bytecode dispatch
macro nextIPIntInstruction()
loadb [PC], t0
if ARM64 or ARM64E
# x0 = opcode
pcrtoaddr ipint_dispatch_base, t7
addlshiftp t7, t0, (constexpr (WTF::fastLog2(JSC::IPInt::alignIPInt))), t0
jmp t0
elsif X86_64
pcrtoaddr ipint_dispatch_base, t1
lshiftq (constexpr (WTF::fastLog2(JSC::IPInt::alignIPInt))), t0
addq t1, t0
jmp t0
else
error
end
end
# Stack operations
# Every value on the stack is always 16 bytes! This makes life easy.
macro pushQuad(reg)
if ARM64 or ARM64E
push reg, reg
elsif X86_64
push reg, reg
else
break
end
end
macro pushQuadPair(reg1, reg2)
push reg1, reg2
end
macro popQuad(reg)
# FIXME: emit post-increment in offlineasm
if ARM64 or ARM64E
loadqinc [sp], reg, V128ISize
elsif X86_64
loadq [sp], reg
addq V128ISize, sp
else
break
end
end
macro pushVec(reg)
pushv reg
end
macro popVec(reg)
popv reg
end
# Typed push/pop to make code pretty
macro pushInt32(reg)
pushQuad(reg)
end
macro popInt32(reg)
popQuad(reg)
end
macro pushFloat32(reg)
pushv reg
end
macro popFloat32(reg)
popv reg
end
macro pushInt64(reg)
pushQuad(reg)
end
macro popInt64(reg)
popQuad(reg)
end
macro pushFloat64(reg)
pushv reg
end
macro popFloat64(reg)
popv reg
end
# Entering IPInt
# MC = location in argumINT bytecode
# csr0 = tmp
# csr1 = dst
# csr2 = src
# csr3 = end
# csr4 = for dispatch
const argumINTTmp = csr0
const argumINTDst = sc0
const argumINTSrc = csr2
const argumINTEnd = csr3
const argumINTDsp = csr4
macro ipintEntry()
const argumINTEndAsScratch = argumINTEnd
checkStackOverflow(ws0, argumINTEndAsScratch)
# Allocate space for locals and rethrow values
if ARM64 or ARM64E
loadpairi Wasm::IPIntCallee::m_localSizeToAlloc[ws0], argumINTTmp, argumINTEnd
else
loadi Wasm::IPIntCallee::m_localSizeToAlloc[ws0], argumINTTmp
loadi Wasm::IPIntCallee::m_numRethrowSlotsToAlloc[ws0], argumINTEnd
end
mulp LocalSize, argumINTEnd
mulp LocalSize, argumINTTmp
subp argumINTEnd, sp
move sp, argumINTEnd
subp argumINTTmp, sp
move sp, argumINTDsp
loadp Wasm::IPIntCallee::m_argumINTBytecode + VectorBufferOffset[ws0], MC
push argumINTTmp, argumINTDst, argumINTSrc, argumINTEnd
move argumINTDsp, argumINTDst
leap FirstArgumentOffset[cfr], argumINTSrc
validateOpcodeConfig(argumINTTmp)
argumINTDispatch()
end
macro argumINTDispatch()
loadb [MC], argumINTTmp
addp 1, MC
bbgteq argumINTTmp, (constexpr IPInt::ArgumINTBytecode::NumOpcodes), _ipint_argument_dispatch_err
lshiftp (constexpr (WTF::fastLog2(JSC::IPInt::alignArgumInt))), argumINTTmp
if ARM64 or ARM64E or X86_64
pcrtoaddr _argumINT_begin, argumINTDsp
addp argumINTTmp, argumINTDsp
jmp argumINTDsp
else
break
end
end
macro argumINTInitializeDefaultLocals()
# zero out remaining locals
bpeq argumINTDst, argumINTEnd, .ipint_entry_finish_zero
loadb [MC], argumINTTmp
addp 1, MC
sxb2p argumINTTmp, argumINTTmp
andp ValueNull, argumINTTmp
if ARM64 or ARM64E
# offlineasm doesn't have xzr so emit it
emit "stp x19, xzr, [x9]"
elsif X86_64
storep argumINTTmp, [argumINTDst]
storep 0, 8[argumINTDst]
end
addp LocalSize, argumINTDst
end
macro argumINTFinish()
pop argumINTEnd, argumINTSrc, argumINTDst, argumINTTmp
end
#############################
# 0x00 - 0x11: control flow #
#############################
ipintOp(_unreachable, macro()
handleDebuggerTrapIfNeededAndThrowWasmTrap(Unreachable)
end)
ipintOp(_nop, macro()
# nop
advancePC(1)
nextIPIntInstruction()
end)
ipintOp(_block, macro()
# block
validateOpcodeConfig(t0)
if ARM64 or ARM64E
loadpairi IPInt::BlockMetadata::deltaPC[MC], t0, t1
else
loadi IPInt::BlockMetadata::deltaPC[MC], t0
loadi IPInt::BlockMetadata::deltaMC[MC], t1
end
sxi2q t0, t0
sxi2q t1, t1
advancePCByReg(t0)
advanceMCByReg(t1)
nextIPIntInstruction()
end)
ipintOp(_loop, macro()
# loop
# We already validateOpcodeConfig in ipintLoopOSR.
ipintLoopOSR(1)
loadb IPInt::InstructionLengthMetadata::length[MC], t0
advancePCByReg(t0)
advanceMCByReg(constexpr (sizeof(IPInt::InstructionLengthMetadata)))
nextIPIntInstruction()
end)
ipintOp(_if, macro()
# if
validateOpcodeConfig(t1)
popInt32(t0)
bineq 0, t0, .ipint_if_taken
if ARM64 or ARM64E
loadpairi IPInt::IfMetadata::elseDeltaPC[MC], t0, t1
else
loadi IPInt::IfMetadata::elseDeltaPC[MC], t0
loadi IPInt::IfMetadata::elseDeltaMC[MC], t1
end
advancePCByReg(t0)
advanceMCByReg(t1)
nextIPIntInstruction()
.ipint_if_taken:
# Skip LEB128
loadb IPInt::IfMetadata::instructionLength[MC], t0
advanceMC(constexpr (sizeof(IPInt::IfMetadata)))
advancePCByReg(t0)
nextIPIntInstruction()
end)
ipintOp(_else, macro()
# else
# Counterintuitively, we only run this instruction if the if
# clause is TAKEN. This is used to branch to the end of the
# block.
validateOpcodeConfig(t0)
if ARM64 or ARM64E
loadpairi IPInt::BlockMetadata::deltaPC[MC], t0, t1
else
loadi IPInt::BlockMetadata::deltaPC[MC], t0
loadi IPInt::BlockMetadata::deltaMC[MC], t1
end
# always skipping forward - no need to sign-extend t0, t1
advancePCByReg(t0)
advanceMCByReg(t1)
nextIPIntInstruction()
end)
ipintOp(_try, macro()
validateOpcodeConfig(t0)
loadb IPInt::InstructionLengthMetadata::length[MC], t0
advancePCByReg(t0)
advanceMC(constexpr (sizeof(IPInt::InstructionLengthMetadata)))
nextIPIntInstruction()
end)
ipintOp(_catch, macro()
# Counterintuitively, like else, we only run this instruction
# if no exception was thrown during the preceeding try or catch block.
validateOpcodeConfig(t0)
if ARM64 or ARM64E
loadpairi IPInt::BlockMetadata::deltaPC[MC], t0, t1
else
loadi IPInt::BlockMetadata::deltaPC[MC], t0
loadi IPInt::BlockMetadata::deltaMC[MC], t1
end
# always skipping forward - no need to sign-extend t0, t1
advancePCByReg(t0)
advanceMCByReg(t1)
nextIPIntInstruction()
end)
ipintOp(_throw, macro()
saveCallSiteIndex()
loadp JSWebAssemblyInstance::m_vm[wasmInstance], t0
loadp VM::topEntryFrame[t0], t0
copyCalleeSavesToEntryFrameCalleeSavesBuffer(t0)
move cfr, a1
move sp, a2
loadi IPInt::ThrowMetadata::exceptionIndex[MC], a3
operationCall(macro() cCall4(_ipint_extern_throw_exception) end)
jumpToException()
end)
ipintOp(_rethrow, macro()
saveCallSiteIndex()
loadp JSWebAssemblyInstance::m_vm[wasmInstance], t0
loadp VM::topEntryFrame[t0], t0
copyCalleeSavesToEntryFrameCalleeSavesBuffer(t0)
move cfr, a1
move PL, a2
loadi IPInt::RethrowMetadata::tryDepth[MC], a3
operationCall(macro() cCall4(_ipint_extern_rethrow_exception) end)
jumpToException()
end)
ipintOp(_throw_ref, macro()
popQuad(a2)
bieq a2, ValueNull, .throw_null_ref
saveCallSiteIndex()
loadp JSWebAssemblyInstance::m_vm[wasmInstance], t0
loadp VM::topEntryFrame[t0], t0
copyCalleeSavesToEntryFrameCalleeSavesBuffer(t0)
move cfr, a1
operationCall(macro() cCall3(_ipint_extern_throw_ref) end)
jumpToException()
.throw_null_ref:
handleDebuggerTrapIfNeededAndThrowWasmTrap(NullExnrefReference)
end)
macro uintDispatch()
loadb [MC], sc1
addq 1, MC
bigteq sc1, (constexpr IPInt::UIntBytecode::NumOpcodes), _ipint_uint_dispatch_err
lshiftq (constexpr (WTF::fastLog2(JSC::IPInt::alignUInt))), sc1
pcrtoaddr _uint_begin, PC
addq PC, sc1
jmp sc1
end
ipintOp(_end, macro()
validateOpcodeConfig(t1)
if X86_64
loadp UnboxedWasmCalleeStackSlot[cfr], ws0
end
loadp Wasm::IPIntCallee::m_bytecodeEnd[ws0], t1
bqeq PC, t1, .ipint_end_ret
advancePC(1)
nextIPIntInstruction()
end)
# This implementation is specially defined out of ipintOp scope to make end implementation tight.
.ipint_end_ret:
loadp Wasm::IPIntCallee::m_uINTBytecode + VectorBufferOffset[ws0], MC
ipintEpilogueOSR(10)
if X86_64
loadp UnboxedWasmCalleeStackSlot[cfr], ws0
end
loadi Wasm::IPIntCallee::m_topOfReturnStackFPOffset[ws0], sc0
addp cfr, sc0
// We've already validateOpcodeConfig() in all the places that can jump to .ipint_end_ret.
uintDispatch()
ipintOp(_br, macro()
# br
validateOpcodeConfig(t0)
loadh IPInt::BranchTargetMetadata::toPop[MC], t0
# number to keep
loadh IPInt::BranchTargetMetadata::toKeep[MC], t1
# ex. pop 3 and keep 2
#
# +4 +3 +2 +1 sp
# a b c d e
# d e
#
# [sp + k + numToPop] = [sp + k] for k in numToKeep-1 -> 0
move t0, t2
mulq StackValueSize, t2
leap [sp, t2], t2
.ipint_br_poploop:
bqeq t1, 0, .ipint_br_popend
subq 1, t1
move t1, t3
mulq StackValueSize, t3
loadq [sp, t3], t0
storeq t0, [t2, t3]
loadq 8[sp, t3], t0
storeq t0, 8[t2, t3]
jmp .ipint_br_poploop
.ipint_br_popend:
loadh IPInt::BranchTargetMetadata::toPop[MC], t0
mulq StackValueSize, t0
leap [sp, t0], sp
if ARM64 or ARM64E
loadpairi IPInt::BlockMetadata::deltaPC[MC], t0, t1
else
loadi IPInt::BlockMetadata::deltaPC[MC], t0
loadi IPInt::BlockMetadata::deltaMC[MC], t1
end
sxi2q t0, t0
sxi2q t1, t1
advancePCByReg(t0)
advanceMCByReg(t1)
nextIPIntInstruction()
end)
ipintOp(_br_if, macro()
# pop i32
validateOpcodeConfig(t2)
popInt32(t0)
bineq t0, 0, _ipint_br
loadb IPInt::BranchMetadata::instructionLength[MC], t0
advanceMC(constexpr (sizeof(IPInt::BranchMetadata)))
advancePCByReg(t0)
nextIPIntInstruction()
end)
ipintOp(_br_table, macro()
# br_table
validateOpcodeConfig(t2)
popInt32(t0)
loadi IPInt::SwitchMetadata::size[MC], t1
advanceMC(constexpr (sizeof(IPInt::SwitchMetadata)))
bib t0, t1, .ipint_br_table_clamped
subq t1, 1, t0
.ipint_br_table_clamped:
move t0, t1
muli (constexpr (sizeof(IPInt::BranchTargetMetadata))), t0
addq t0, MC
jmp _ipint_br
end)
ipintOp(_return, macro()
validateOpcodeConfig(MC)
# ret
if X86_64
loadp UnboxedWasmCalleeStackSlot[cfr], ws0
end
# This is guaranteed going to an end instruction, so skip
# dispatch and end of program check for speed
jmp .ipint_end_ret
end)
if ARM64 or ARM64E
const IPIntCallCallee = sc1
const IPIntCallFunctionSlot = sc0
elsif X86_64
const IPIntCallCallee = t7
const IPIntCallFunctionSlot = t6
end
ipintOp(_call, macro()
// The operationCall below already calls validateOpcodeConfig().
saveCallSiteIndex()
loadb IPInt::CallMetadata::length[MC], t0
advancePCByReg(t0)
move cfr, a1
move MC, a2
advanceMC(IPInt::CallMetadata::signature)
subq 16, sp
move sp, a3
# operation returns the entrypoint in r0 and the target instance in r1
# operation stores the target callee to sp[0] and target function info to sp[1]
operationCall(macro() cCall4(_ipint_extern_prepare_call) end)
loadq [sp], IPIntCallCallee
loadq 8[sp], IPIntCallFunctionSlot
addq 16, sp
# call
jmp .ipint_call_common
end)
ipintOp(_call_indirect, macro()
// The operationCall below already calls validateOpcodeConfig().
saveCallSiteIndex()
loadb IPInt::CallIndirectMetadata::length[MC], t2
advancePCByReg(t2)
# Get function index by pointer, use it as a return for callee
move sp, a2
# Get callIndirectMetadata
move cfr, a1
move MC, a3
advanceMC(IPInt::CallIndirectMetadata::signature)
operationCallMayThrow(macro() cCall4(_ipint_extern_prepare_call_indirect) end)
loadq [sp], IPIntCallCallee
loadq 8[sp], IPIntCallFunctionSlot
addq 16, sp
jmp .ipint_call_common
end)
ipintOp(_return_call, macro()
// The operationCall below already calls validateOpcodeConfig().
saveCallSiteIndex()
loadb IPInt::TailCallMetadata::length[MC], t0
advancePCByReg(t0)
move cfr, a1
move MC, a2
subq 16, sp
move sp, a3
# operation returns the entrypoint in r0 and the target instance in r1
# this operation stores the boxed Callee into *r2
operationCall(macro() cCall4(_ipint_extern_prepare_call) end)
loadq [sp], IPIntCallCallee
loadq 8[sp], IPIntCallFunctionSlot
addq 16, sp
loadi IPInt::TailCallMetadata::callerStackArgSize[MC], t3
advanceMC(IPInt::TailCallMetadata::argumentBytecode)
jmp .ipint_tail_call_common
end)
ipintOp(_return_call_indirect, macro()
// The operationCallMayThrow below already calls validateOpcodeConfig().
saveCallSiteIndex()
loadb IPInt::TailCallIndirectMetadata::length[MC], t2
advancePCByReg(t2)
# Get function index by pointer, use it as a return for callee
move sp, a2
# Get callIndirectMetadata
move cfr, a1
move MC, a3
operationCallMayThrow(macro() cCall4(_ipint_extern_prepare_call_indirect) end)
loadq [sp], IPIntCallCallee
loadq 8[sp], IPIntCallFunctionSlot
addq 16, sp
loadi IPInt::TailCallIndirectMetadata::callerStackArgSize[MC], t3
advanceMC(IPInt::TailCallIndirectMetadata::argumentBytecode)
jmp .ipint_tail_call_common
end)
ipintOp(_call_ref, macro()
// The operationCall below already calls validateOpcodeConfig().
saveCallSiteIndex()
move cfr, a1
move MC, a2
move sp, a3
operationCallMayThrow(macro() cCall4(_ipint_extern_prepare_call_ref) end)
loadq [sp], IPIntCallCallee
loadq 8[sp], IPIntCallFunctionSlot
addq 16, sp
loadb IPInt::CallRefMetadata::length[MC], t3
advanceMC(IPInt::CallRefMetadata::signature)
advancePCByReg(t3)
jmp .ipint_call_common
end)
ipintOp(_return_call_ref, macro()
// The operationCallMayThrow below already calls validateOpcodeConfig().
saveCallSiteIndex()
loadb IPInt::TailCallRefMetadata::length[MC], t2
advancePCByReg(t2)
move cfr, a1
move MC, a2
move sp, a3
operationCallMayThrow(macro() cCall4(_ipint_extern_prepare_call_ref) end)
loadq [sp], IPIntCallCallee
loadq 8[sp], IPIntCallFunctionSlot
addq 16, sp
loadi IPInt::TailCallRefMetadata::callerStackArgSize[MC], t3
advanceMC(IPInt::TailCallRefMetadata::argumentBytecode)
jmp .ipint_tail_call_common
end)
reservedOpcode(0x16)
reservedOpcode(0x17)
ipintOp(_delegate, macro()
# Counterintuitively, like else, we only run this instruction
# if no exception was thrown during the preceeding try or catch block.
validateOpcodeConfig(t0)
if ARM64 or ARM64E
loadpairi IPInt::BlockMetadata::deltaPC[MC], t0, t1
else
loadi IPInt::BlockMetadata::deltaPC[MC], t0
loadi IPInt::BlockMetadata::deltaMC[MC], t1
end
# always skipping forward - no need to sign-extend t0, t1
advancePCByReg(t0)
advanceMCByReg(t1)
nextIPIntInstruction()
end)
ipintOp(_catch_all, macro()
# Counterintuitively, like else, we only run this instruction
# if no exception was thrown during the preceeding try or catch block.
validateOpcodeConfig(t0)
if ARM64 or ARM64E
loadpairi IPInt::BlockMetadata::deltaPC[MC], t0, t1
else
loadi IPInt::BlockMetadata::deltaPC[MC], t0
loadi IPInt::BlockMetadata::deltaMC[MC], t1
end
# always skipping forward - no need to sign-extend t0, t1
advancePCByReg(t0)
advanceMCByReg(t1)
nextIPIntInstruction()
end)
ipintOp(_drop, macro()
addq StackValueSize, sp
advancePC(1)
nextIPIntInstruction()
end)
ipintOp(_select, macro()
popInt32(t0)
bieq t0, 0, .ipint_select_val2
addq StackValueSize, sp
advancePC(1)
advanceMC(constexpr (sizeof(IPInt::InstructionLengthMetadata)))
nextIPIntInstruction()
.ipint_select_val2:
popVec(v1)
popVec(v0)
pushVec(v1)
advancePC(1)
advanceMC(constexpr (sizeof(IPInt::InstructionLengthMetadata)))
nextIPIntInstruction()
end)
ipintOp(_select_t, macro()
popInt32(t0)
bieq t0, 0, .ipint_select_t_val2
addq StackValueSize, sp
loadb IPInt::InstructionLengthMetadata::length[MC], t0
advancePCByReg(t0)
advanceMC(constexpr (sizeof(IPInt::InstructionLengthMetadata)))
nextIPIntInstruction()
.ipint_select_t_val2:
popVec(v1)
popVec(v0)
pushVec(v1)
loadb IPInt::InstructionLengthMetadata::length[MC], t0
advancePCByReg(t0)
advanceMC(constexpr (sizeof(IPInt::InstructionLengthMetadata)))
nextIPIntInstruction()
end)
reservedOpcode(0x1d)
reservedOpcode(0x1e)
ipintOp(_try_table, macro()
# advance MC/PC
validateOpcodeConfig(t0)
if ARM64 or ARM64E
loadpairi IPInt::BlockMetadata::deltaPC[MC], t0, t1
else
loadi IPInt::BlockMetadata::deltaPC[MC], t0
loadi IPInt::BlockMetadata::deltaMC[MC], t1
end
# always skipping forward - no need to sign-extend t0, t1
advancePCByReg(t0)
advanceMCByReg(t1)
nextIPIntInstruction()
end)
###################################
# 0x20 - 0x26: get and set values #
###################################
macro localGetPostDecode()
# Index into locals
mulq LocalSize, t0
loadv [PL, t0], v0
# Push to stack
pushVec(v0)
nextIPIntInstruction()
end
ipintOp(_local_get, macro()
# local.get
loadb 1[PC], t0
advancePC(2)
bbaeq t0, 128, _ipint_local_get_slow_path
localGetPostDecode()
end)
macro localSetPostDecode()
# Pop from stack
popVec(v0)
# Store to locals
mulq LocalSize, t0
storev v0, [PL, t0]
nextIPIntInstruction()
end
ipintOp(_local_set, macro()
# local.set
loadb 1[PC], t0
advancePC(2)
bbaeq t0, 128, _ipint_local_set_slow_path
localSetPostDecode()
end)
macro localTeePostDecode()
# Load from stack
loadv [sp], v0
# Store to locals
mulq LocalSize, t0
storev v0, [PL, t0]
nextIPIntInstruction()
end
ipintOp(_local_tee, macro()
# local.tee
loadb 1[PC], t0
advancePC(2)
bbaeq t0, 128, _ipint_local_tee_slow_path
localTeePostDecode()
end)
ipintOp(_global_get, macro()
loadb IPInt::GlobalMetadata::instructionLength[MC], t0
advancePCByReg(t0)
# Load pre-computed index from metadata
loadb IPInt::GlobalMetadata::bindingMode[MC], t2
loadi IPInt::GlobalMetadata::index[MC], t1
loadp JSWebAssemblyInstance::m_globals[wasmInstance], t0
advanceMC(constexpr (sizeof(IPInt::GlobalMetadata)))
lshiftp 1, t1
bieq t2, 0, .ipint_global_get_embedded
loadp [t0, t1, 8], t0
loadv [t0], v0
pushVec(v0)
nextIPIntInstruction()
.ipint_global_get_embedded:
loadv [t0, t1, 8], v0
pushVec(v0)
nextIPIntInstruction()
end)
ipintOp(_global_set, macro()
# isRef = 1 => ref, use slowpath
loadb IPInt::GlobalMetadata::isRef[MC], t0
bineq t0, 0, .ipint_global_set_refpath
# bindingMode = 1 => portable
loadb IPInt::GlobalMetadata::bindingMode[MC], t2
# get global addr
loadp JSWebAssemblyInstance::m_globals[wasmInstance], t0
# get value to store
popVec(v0)
# get index
loadi IPInt::GlobalMetadata::index[MC], t1
lshiftp 1, t1
bieq t2, 0, .ipint_global_set_embedded
# portable: dereference then set
loadp [t0, t1, 8], t0
storev v0, [t0]
loadb IPInt::GlobalMetadata::instructionLength[MC], t0
advancePCByReg(t0)
advanceMC(constexpr (sizeof(IPInt::GlobalMetadata)))
jmp .ipint_global_set_dispatch
.ipint_global_set_embedded:
# embedded: set directly
storev v0, [t0, t1, 8]
loadb IPInt::GlobalMetadata::instructionLength[MC], t0
advancePCByReg(t0)
advanceMC(constexpr (sizeof(IPInt::GlobalMetadata)))
jmp .ipint_global_set_dispatch
.ipint_global_set_refpath:
loadi IPInt::GlobalMetadata::index[MC], a1
# Pop from stack
popQuad(a2)
operationCall(macro() cCall3(_ipint_extern_set_global_ref) end)
loadb IPInt::GlobalMetadata::instructionLength[MC], t0
advancePCByReg(t0)
advanceMC(constexpr (sizeof(IPInt::GlobalMetadata)))
.ipint_global_set_dispatch:
nextIPIntInstruction()
end)
ipintOp(_table_get, macro()
# Load pre-computed index from metadata
loadi IPInt::Const32Metadata::value[MC], a1
popInt32(a2)
operationCallMayThrow(macro() cCall3(_ipint_extern_table_get) end)
pushQuad(r0)
loadb IPInt::Const32Metadata::instructionLength[MC], t0
advancePCByReg(t0)
advanceMC(constexpr (sizeof(IPInt::Const32Metadata)))
nextIPIntInstruction()
end)
ipintOp(_table_set, macro()
# Load pre-computed index from metadata
loadi IPInt::Const32Metadata::value[MC], a1
popQuad(a3)
popInt32(a2)
operationCallMayThrow(macro() cCall4(_ipint_extern_table_set) end)
loadb IPInt::Const32Metadata::instructionLength[MC], t0
advancePCByReg(t0)
advanceMC(constexpr (sizeof(IPInt::Const32Metadata)))
nextIPIntInstruction()
end)
reservedOpcode(0x27)
macro popMemoryIndex(reg, tmp)
loadb JSWebAssemblyInstance::m_cachedIsMemory64[wasmInstance], tmp
btiz tmp, .memory32
popInt64(reg)
jmp .done
.memory32:
popInt32(reg)
ori 0, reg
.done:
end
# FIXME(wasm-multimemory): delete eventually
macro ipintCheckMemoryBound(mem, scratch, size)
# Memory indices are 32 bit
leap size - 1[mem], scratch
bpb scratch, boundsCheckingSize, .continuation
handleDebuggerTrapIfNeededAndThrowWasmTrap(OutOfBoundsMemoryAccess)
.continuation:
end
# FIXME(wasm-multimemory): delete eventually
macro loadMemoryOffsetAndAdvanceMC(dstReg, tmpReg, instrLenReg)
loadb JSWebAssemblyInstance::m_cachedIsMemory64[wasmInstance], tmpReg
btiz tmpReg, .memory32
loadq IPInt::Const64Metadata::value[MC], dstReg
loadb IPInt::Const64Metadata::instructionLength[MC], instrLenReg
advanceMC(constexpr (sizeof(IPInt::Const64Metadata)))
jmp .done
.memory32:
loadi IPInt::Const32Metadata::value[MC], dstReg
loadb IPInt::Const32Metadata::instructionLength[MC], instrLenReg
advanceMC(constexpr (sizeof(IPInt::Const32Metadata)))
.done:
end
macro baddpc(src, dst, label)
# FIXME: make this a proper instruction
addp src, dst
bpb dst, src, label # unsigned overflow check
end
macro loadStoreAdvanceMCAndMakePointer(instrLenReg, wasmAddrReg, size, scratch, scratch2)
# overwrites wasmAddrReg with computed pointer
loadb JSWebAssemblyInstance::m_cachedIsMemory64[wasmInstance], scratch
const memoryIndexSize = sizeof IPInt::MemoryIndexMetadata
btiz scratch, .memory32
loadq memoryIndexSize + IPInt::Const64Metadata::value[MC], instrLenReg # reuse instrLenReg to store offset
baddpc(instrLenReg, wasmAddrReg, .outOfBounds)
move size - 1, scratch2
baddpc(wasmAddrReg, scratch2, .outOfBounds)
loadb memoryIndexSize + IPInt::Const64Metadata::instructionLength[MC], instrLenReg
loadb IPInt::MemoryIndexMetadata::memoryIndex[MC], scratch # scratch contains memory index now
advanceMC(memoryIndexSize + sizeof IPInt::Const64Metadata)
jmp .doneLoadingWasmAddress
.memory32:
loadi memoryIndexSize + IPInt::Const32Metadata::value[MC], instrLenReg # reuse instrLenReg to store offset
baddpc(instrLenReg, wasmAddrReg, .outOfBounds)
move size - 1, scratch2
baddpc(wasmAddrReg, scratch2, .outOfBounds)
loadb memoryIndexSize + IPInt::Const32Metadata::instructionLength[MC], instrLenReg
loadb IPInt::MemoryIndexMetadata::memoryIndex[MC], scratch # scratch contains memory index now
advanceMC(memoryIndexSize + sizeof IPInt::Const32Metadata)
.doneLoadingWasmAddress:
btinz scratch, .memoryIsNotZero
bpaeq scratch2, boundsCheckingSize, .outOfBounds # scratch2 contains wasm address + size - 1
addp memoryBase, wasmAddrReg
jmp .done
.memoryIsNotZero:
mulp constexpr (sizeof(JSWebAssemblyInstance::WasmMemoryBaseAndSize)), scratch
# FIXME: it's probably worth trying to use a loadpair here, but that requires a separate x86 codepath
loadp (constexpr (JSWebAssemblyInstance::offsetOfCachedMemoryBaseSizePair(0) + sizeof(void*))) [wasmInstance, scratch], scratch2 # bounds checking size
bpaeq wasmAddrReg, scratch2, .outOfBounds
loadp (constexpr (JSWebAssemblyInstance::offsetOfCachedMemoryBaseSizePair(0))) [wasmInstance, scratch], scratch2 # memory base
addp scratch2, wasmAddrReg
jmp .done
.outOfBounds:
handleDebuggerTrapIfNeededAndThrowWasmTrap(OutOfBoundsMemoryAccess)
.done:
end
ipintOp(_i32_load_mem, macro()
# i32.load
# pop index
popMemoryIndex(t0, t2)
loadStoreAdvanceMCAndMakePointer(t4, t0, 4, t1, t2)
# load memory location
loadi [t0], t1
pushInt32(t1)
advancePCByReg(t4)
nextIPIntInstruction()
end)
ipintOp(_i64_load_mem, macro()
# i32.load
# pop index
popMemoryIndex(t0, t2)
loadStoreAdvanceMCAndMakePointer(t4, t0, 8, t1, t2)
# load memory location