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| 1 | +/* |
| 2 | + * This file is part of the MicroPython project, http://micropython.org/ |
| 3 | + * |
| 4 | + * The MIT License (MIT) |
| 5 | + * |
| 6 | + * Copyright (c) 2018 Damien P. George |
| 7 | + * |
| 8 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 9 | + * of this software and associated documentation files (the "Software"), to deal |
| 10 | + * in the Software without restriction, including without limitation the rights |
| 11 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 12 | + * copies of the Software, and to permit persons to whom the Software is |
| 13 | + * furnished to do so, subject to the following conditions: |
| 14 | + * |
| 15 | + * The above copyright notice and this permission notice shall be included in |
| 16 | + * all copies or substantial portions of the Software. |
| 17 | + * |
| 18 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 19 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 20 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 21 | + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 22 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 23 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 24 | + * THE SOFTWARE. |
| 25 | + */ |
| 26 | + |
| 27 | +#include "i2cslave.h" |
| 28 | + |
| 29 | +#if defined(STM32F4) |
| 30 | + |
| 31 | +void i2c_slave_init_helper(i2c_slave_t *i2c, int addr) { |
| 32 | + i2c->CR2 = I2C_CR2_ITBUFEN | I2C_CR2_ITEVTEN | 4 << I2C_CR2_FREQ_Pos; |
| 33 | + i2c->OAR1 = 1 << 14 | addr << 1; |
| 34 | + i2c->OAR2 = 0; |
| 35 | + i2c->CR1 = I2C_CR1_ACK | I2C_CR1_PE; |
| 36 | +} |
| 37 | + |
| 38 | +void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) { |
| 39 | + uint32_t sr1 = i2c->SR1; |
| 40 | + if (sr1 & I2C_SR1_ADDR) { |
| 41 | + // Address matched |
| 42 | + // Read of SR1, SR2 needed to clear ADDR bit |
| 43 | + sr1 = i2c->SR1; |
| 44 | + uint32_t sr2 = i2c->SR2; |
| 45 | + i2c_slave_process_addr_match((sr2 >> I2C_SR2_TRA_Pos) & 1); |
| 46 | + } |
| 47 | + if (sr1 & I2C_SR1_STOPF) { |
| 48 | + // STOPF only set at end of RX mode (in TX mode AF is set on NACK) |
| 49 | + // Read of SR1, write CR1 needed to clear STOPF bit |
| 50 | + sr1 = i2c->SR1; |
| 51 | + i2c->CR1 &= ~I2C_CR1_ACK; |
| 52 | + i2c_slave_process_rx_end(); |
| 53 | + i2c->CR1 |= I2C_CR1_ACK; |
| 54 | + } |
| 55 | + if (sr1 & I2C_SR1_TXE) { |
| 56 | + i2c->DR = i2c_slave_process_tx_byte(); |
| 57 | + } |
| 58 | + if (sr1 & I2C_SR1_RXNE) { |
| 59 | + i2c_slave_process_rx_byte(i2c->DR); |
| 60 | + } |
| 61 | +} |
| 62 | + |
| 63 | +#elif defined(STM32F7) |
| 64 | + |
| 65 | +void i2c_slave_init_helper(i2c_slave_t *i2c, int addr) { |
| 66 | + i2c->CR1 = I2C_CR1_STOPIE | I2C_CR1_ADDRIE | I2C_CR1_RXIE | I2C_CR1_TXIE; |
| 67 | + i2c->CR2 = 0; |
| 68 | + i2c->OAR1 = I2C_OAR1_OA1EN | addr << 1; |
| 69 | + i2c->OAR2 = 0; |
| 70 | + i2c->CR1 |= I2C_CR1_PE; |
| 71 | +} |
| 72 | + |
| 73 | +void i2c_slave_ev_irq_handler(i2c_slave_t *i2c) { |
| 74 | + uint32_t isr = i2c->ISR; |
| 75 | + if (isr & I2C_ISR_ADDR) { |
| 76 | + // Address matched |
| 77 | + // Set TXE so that TXDR is flushed and ready for the first byte |
| 78 | + i2c->ISR = I2C_ISR_TXE; |
| 79 | + i2c->ICR = I2C_ICR_ADDRCF; |
| 80 | + i2c_slave_process_addr_match(0); |
| 81 | + } |
| 82 | + if (isr & I2C_ISR_STOPF) { |
| 83 | + // STOPF only set for STOP condition, not a repeated START |
| 84 | + i2c->ICR = I2C_ICR_STOPCF; |
| 85 | + i2c->OAR1 &= ~I2C_OAR1_OA1EN; |
| 86 | + if (i2c->ISR & I2C_ISR_DIR) { |
| 87 | + //i2c_slave_process_tx_end(); |
| 88 | + } else { |
| 89 | + i2c_slave_process_rx_end(); |
| 90 | + } |
| 91 | + i2c->OAR1 |= I2C_OAR1_OA1EN; |
| 92 | + } |
| 93 | + if (isr & I2C_ISR_TXIS) { |
| 94 | + i2c->TXDR = i2c_slave_process_tx_byte(); |
| 95 | + } |
| 96 | + if (isr & I2C_ISR_RXNE) { |
| 97 | + i2c_slave_process_rx_byte(i2c->RXDR); |
| 98 | + } |
| 99 | +} |
| 100 | + |
| 101 | +#endif |
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