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Tobias Badertscherdpgeorge
Tobias Badertscher
authored and
dpgeorge
committed
stmhal: L4: Adapt DMA to be able to support STM32L4 MCU series.
The main thing is to change the DMA code in a way that the structure DMA_Stream_TypeDef (which is similar to DMA_Channel_TypeDef on stm32l4) is no longer used outside of dma.c, as this structure only exists for the F4 series. Therefore I introduced a new structure (dma_descr_t) which handles all DMA specific stuff for configuration. Further the periphery (spi, i2c, sdcard, dac) does not need to know the internals of the dma.
1 parent eb54e4d commit e64032d

6 files changed

Lines changed: 456 additions & 277 deletions

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‎stmhal/dac.c‎

Lines changed: 17 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@
6767
/// dac = DAC(1)
6868
/// dac.write_timed(buf, 400 * len(buf), mode=DAC.CIRCULAR)
6969

70-
#if MICROPY_HW_ENABLE_DAC
70+
#if defined(MICROPY_HW_ENABLE_DAC) && MICROPY_HW_ENABLE_DAC
7171

7272
STATIC DAC_HandleTypeDef DAC_Handle;
7373

@@ -139,7 +139,7 @@ typedef enum {
139139
typedef struct _pyb_dac_obj_t {
140140
mp_obj_base_t base;
141141
uint32_t dac_channel; // DAC_CHANNEL_1 or DAC_CHANNEL_2
142-
DMA_Stream_TypeDef *dma_stream; // DMA1_Stream5 or DMA1_Stream6
142+
const dma_descr_t *tx_dma_descr;
143143
uint16_t pin; // GPIO_PIN_4 or GPIO_PIN_5
144144
uint8_t bits; // 8 or 12
145145
uint8_t state;
@@ -162,7 +162,13 @@ STATIC mp_obj_t pyb_dac_init_helper(pyb_dac_obj_t *self, mp_uint_t n_args, const
162162
HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
163163

164164
// DAC peripheral clock
165+
#if defined(MCU_SERIES_F4) || defined(MCU_SERIES_F7)
165166
__DAC_CLK_ENABLE();
167+
#elif defined(MCU_SERIES_L4)
168+
__HAL_RCC_DAC1_CLK_ENABLE();
169+
#else
170+
#error Unsupported Processor
171+
#endif
166172

167173
// stop anything already going on
168174
HAL_DAC_Stop(&DAC_Handle, self->dac_channel);
@@ -217,11 +223,11 @@ STATIC mp_obj_t pyb_dac_make_new(const mp_obj_type_t *type, mp_uint_t n_args, mp
217223
if (dac_id == 1) {
218224
dac->pin = GPIO_PIN_4;
219225
dac->dac_channel = DAC_CHANNEL_1;
220-
dac->dma_stream = DMA_STREAM_DAC1;
226+
dac->tx_dma_descr = &dma_DAC_1_TX;
221227
} else if (dac_id == 2) {
222228
dac->pin = GPIO_PIN_5;
223229
dac->dac_channel = DAC_CHANNEL_2;
224-
dac->dma_stream = DMA_STREAM_DAC2;
230+
dac->tx_dma_descr = &dma_DAC_2_TX;
225231
} else {
226232
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "DAC %d does not exist", dac_id));
227233
}
@@ -371,9 +377,12 @@ mp_obj_t pyb_dac_write_timed(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_
371377

372378
__DMA1_CLK_ENABLE();
373379

380+
DMA_HandleTypeDef DMA_Handle;
381+
/* Get currently configured dma */
382+
dma_init_handle(&DMA_Handle, self->tx_dma_descr, (void*)NULL);
374383
/*
375-
DMA_Cmd(self->dma_stream, DISABLE);
376-
while (DMA_GetCmdStatus(self->dma_stream) != DISABLE) {
384+
DMA_Cmd(DMA_Handle->Instance, DISABLE);
385+
while (DMA_GetCmdStatus(DMA_Handle->Instance) != DISABLE) {
377386
}
378387
379388
DAC_Cmd(self->dac_channel, DISABLE);
@@ -389,18 +398,10 @@ mp_obj_t pyb_dac_write_timed(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_
389398
DAC_Init(self->dac_channel, &DAC_InitStructure);
390399
*/
391400

392-
// DMA1_Stream[67] channel7 configuration
393-
DMA_HandleTypeDef DMA_Handle;
394-
DMA_Handle.Instance = self->dma_stream;
395-
396401
// Need to deinit DMA first
397402
DMA_Handle.State = HAL_DMA_STATE_READY;
398403
HAL_DMA_DeInit(&DMA_Handle);
399404

400-
DMA_Handle.Init.Channel = DMA_CHANNEL_DAC1; // DAC1 & DAC2 both use the same channel
401-
DMA_Handle.Init.Direction = DMA_MEMORY_TO_PERIPH;
402-
DMA_Handle.Init.PeriphInc = DMA_PINC_DISABLE;
403-
DMA_Handle.Init.MemInc = DMA_MINC_ENABLE;
404405
if (self->bits == 8) {
405406
DMA_Handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
406407
DMA_Handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
@@ -409,11 +410,6 @@ mp_obj_t pyb_dac_write_timed(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_
409410
DMA_Handle.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
410411
}
411412
DMA_Handle.Init.Mode = args[2].u_int;
412-
DMA_Handle.Init.Priority = DMA_PRIORITY_HIGH;
413-
DMA_Handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
414-
DMA_Handle.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL;
415-
DMA_Handle.Init.MemBurst = DMA_MBURST_SINGLE;
416-
DMA_Handle.Init.PeriphBurst = DMA_PBURST_SINGLE;
417413
HAL_DMA_Init(&DMA_Handle);
418414

419415
if (self->dac_channel == DAC_CHANNEL_1) {
@@ -444,8 +440,8 @@ mp_obj_t pyb_dac_write_timed(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_
444440

445441
/*
446442
// enable DMA stream
447-
DMA_Cmd(self->dma_stream, ENABLE);
448-
while (DMA_GetCmdStatus(self->dma_stream) == DISABLE) {
443+
DMA_Cmd(DMA_Handle->Instance, ENABLE);
444+
while (DMA_GetCmdStatus(DMA_Handle->Instance) == DISABLE) {
449445
}
450446
451447
// enable DAC channel

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