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Merge pull request adafruit#3025 from hierophect/stm32-f7-startup
STM32: Add DTCM and ITCM support to F7 series
2 parents ca3e55b + c88a8e6 commit e27f68f

11 files changed

Lines changed: 67 additions & 15 deletions

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‎ports/stm/boards/STM32F746xG_fs.ld‎

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,14 +26,20 @@
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* THE SOFTWARE.
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*/
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29+
/* Entry Point */
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ENTRY(Reset_Handler)
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32+
_ld_default_stack_size = 24K;
33+
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
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FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0 */
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FLASH_FS (rx) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1,2,3 are 32K */
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FLASH_FIRMWARE (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sector 4 is 128K, sectors 5,6,7 are 256K */
36-
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320K
41+
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
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RAM (xrw) : ORIGIN = 0x20010000, LENGTH = 256K /* AXI SRAM */
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ITCM (xrw) : ORIGIN = 0x00000000, LENGTH = 16K
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}
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@@ -44,7 +50,7 @@ _minimum_heap_size = 16K;
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/* Define tho top end of the stack. The stack is full descending so begins just
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above last byte of RAM. Note that EABI requires the stack to be 8-byte
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aligned for a call. */
47-
_estack = ORIGIN(RAM) + LENGTH(RAM);
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_estack = ORIGIN(DTCM) + LENGTH(DTCM);
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);

‎ports/stm/boards/STM32F767_fs.ld‎

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,14 +2,21 @@
22
GNU linker script for STM32F767 with filesystem
33
*/
44

5+
/* Entry Point */
6+
ENTRY(Reset_Handler)
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8+
_ld_default_stack_size = 24K;
9+
510
/* Specify the memory areas */
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MEMORY
712
{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */
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FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0 */
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FLASH_FS (rx) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1,2,3 are 32K */
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FLASH_FIRMWARE (rx) : ORIGIN = 0x08020000, LENGTH = 1920K /* sector 4 is 128K, sectors 5,6,7 are 256K */
12-
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K
17+
DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
18+
RAM (xrw) : ORIGIN = 0x20020000, LENGTH = 384K /* AXI SRAM */
19+
ITCM (xrw) : ORIGIN = 0x00000000, LENGTH = 16K
1320
}
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/* produce a link error if there is not this amount of RAM for these sections */
@@ -19,7 +26,7 @@ _minimum_heap_size = 16K;
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/* Define tho top end of the stack. The stack is full descending so begins just
2027
above last byte of RAM. Note that EABI requires the stack to be 8-byte
2128
aligned for a call. */
22-
_estack = ORIGIN(RAM) + LENGTH(RAM);
29+
_estack = ORIGIN(DTCM) + LENGTH(DTCM);
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);

‎ports/stm/boards/nucleo_f746zg/mpconfigboard.h‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,14 @@
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#define FLASH_SIZE (0x100000)
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#define FLASH_PAGE_SIZE (0x4000)
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// H7 and F7 MPU definitions
37+
#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_1MB
38+
#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_16KB
39+
#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB
40+
#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_256KB
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#define CPY_SRAM_SUBMASK 0x00
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#define CPY_SRAM_START_ADDR 0x20010000
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3644
#define HSE_VALUE ((uint32_t)8000000)
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#define LSE_VALUE ((uint32_t)32768)
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#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal

‎ports/stm/boards/nucleo_f746zg/mpconfigboard.mk‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,5 +10,5 @@ MCU_SERIES = F7
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MCU_VARIANT = STM32F746xx
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MCU_PACKAGE = LQFP144
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13-
LD_COMMON = boards/common_default.ld
13+
LD_COMMON = boards/common_tcm.ld
1414
LD_FILE = boards/STM32F746xG_fs.ld

‎ports/stm/boards/nucleo_f767zi/mpconfigboard.h‎

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Original file line numberDiff line numberDiff line change
@@ -32,6 +32,14 @@
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#define FLASH_SIZE (0x200000)
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#define FLASH_PAGE_SIZE (0x4000)
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35+
// H7 and F7 MPU definitions
36+
#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_2MB
37+
#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_16KB
38+
#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB
39+
#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_512KB
40+
#define CPY_SRAM_SUBMASK 0xFC // Mask 512 to 384
41+
#define CPY_SRAM_START_ADDR 0x20020000
42+
3543
#define HSE_VALUE ((uint32_t)8000000)
3644
#define LSE_VALUE ((uint32_t)32768)
3745
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal

‎ports/stm/boards/nucleo_f767zi/mpconfigboard.mk‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,5 +10,5 @@ MCU_SERIES = F7
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MCU_VARIANT = STM32F767xx
1111
MCU_PACKAGE = LQFP144
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13-
LD_COMMON = boards/common_default.ld
13+
LD_COMMON = boards/common_tcm.ld
1414
LD_FILE = boards/STM32F767_fs.ld

‎ports/stm/boards/nucleo_h743zi_2/mpconfigboard.h‎

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Original file line numberDiff line numberDiff line change
@@ -31,6 +31,14 @@
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#define FLASH_PAGE_SIZE (0x4000)
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34+
// H7 and F7 MPU definitions
35+
#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_2MB
36+
#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_64KB
37+
#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB
38+
#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_512KB
39+
#define CPY_SRAM_SUBMASK 0x00
40+
#define CPY_SRAM_START_ADDR 0x24000000
41+
3442
#define HSE_VALUE ((uint32_t)8000000)
3543
#define LSE_VALUE ((uint32_t)32768)
3644
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal

‎ports/stm/boards/openmv_h7/mpconfigboard.h‎

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Original file line numberDiff line numberDiff line change
@@ -31,5 +31,13 @@
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#define FLASH_PAGE_SIZE (0x4000)
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34+
// H7 and F7 MPU definitions
35+
#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_2MB
36+
#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_64KB
37+
#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB
38+
#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_512KB
39+
#define CPY_SRAM_SUBMASK 0x00
40+
#define CPY_SRAM_START_ADDR 0x24000000
41+
3442
#define HSE_VALUE ((uint32_t)12000000)
3543
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)

‎ports/stm/boards/stm32f746g_discovery/mpconfigboard.h‎

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Original file line numberDiff line numberDiff line change
@@ -34,6 +34,14 @@
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#define FLASH_SIZE (0x100000)
3535
#define FLASH_PAGE_SIZE (0x4000)
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37+
// H7 and F7 MPU definitions
38+
#define CPY_FLASH_REGION_SIZE ARM_MPU_REGION_SIZE_1MB
39+
#define CPY_ITCM_REGION_SIZE ARM_MPU_REGION_SIZE_16KB
40+
#define CPY_DTCM_REGION_SIZE ARM_MPU_REGION_SIZE_128KB
41+
#define CPY_SRAM_REGION_SIZE ARM_MPU_REGION_SIZE_256KB
42+
#define CPY_SRAM_SUBMASK 0x00
43+
#define CPY_SRAM_START_ADDR 0x20010000
44+
3745
// Lower frequency to allow external RAM use
3846
#define HSE_VALUE ((uint32_t)25000000)
3947
#define LSE_VALUE ((uint32_t)32768)

‎ports/stm/boards/stm32f746g_discovery/mpconfigboard.mk‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,5 +10,5 @@ MCU_SERIES = F7
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MCU_VARIANT = STM32F746xx
1111
MCU_PACKAGE = TFBGA216
1212

13-
LD_COMMON = boards/common_default.ld
13+
LD_COMMON = boards/common_tcm.ld
1414
LD_FILE = boards/STM32F746xG_fs.ld

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