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dhylandsdpgeorge
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stmhal: Increase the priority of UART IRQ.
The UARTs have no FIFOs, so if interrupts are disabled for more than a character time (10 usec at 1 Mbit/sec) then characters get dropped. The overhead for handling a UART ISR is about 0.5 usec, so even at baud rates of 1 Mbit/sec this only corresponds to about 5% of the CPU. Lower baud rates will have less of an impact.
1 parent 90202b4 commit c8437f9

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Lines changed: 6 additions & 4 deletions

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stmhal/irq.h

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -64,9 +64,14 @@ MP_DECLARE_CONST_FUN_OBJ(pyb_enable_irq_obj);
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//#def IRQ_PRI_SYSTICK 0
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//#def IRQ_SUBPRI_SYSTICK 0
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67+
// The UARTs have no FIFOs, so if they don't get serviced quickly then characters
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// get dropped. The handling for each character only consumes about 0.5 usec
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#define IRQ_PRI_UART 1
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#define IRQ_SUBPRI_UART 0
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// Flash IRQ must be higher priority than interrupts of all those components
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// that rely on the flash storage.
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#define IRQ_PRI_FLASH 1
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#define IRQ_PRI_FLASH 2
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#define IRQ_SUBPRI_FLASH 0
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// SDIO must be higher priority than DMA for SDIO DMA transfers to work.
@@ -93,9 +98,6 @@ MP_DECLARE_CONST_FUN_OBJ(pyb_enable_irq_obj);
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#define IRQ_PRI_CAN 7
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#define IRQ_SUBPRI_CAN 0
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96-
#define IRQ_PRI_UART 13
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#define IRQ_SUBPRI_UART 0
98-
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// Interrupt priority for non-special timers.
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#define IRQ_PRI_TIMX 14
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#define IRQ_SUBPRI_TIMX 0

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