@@ -75,10 +75,14 @@ static bool bus_uses_iomux_pins(spi_host_device_t host, const spi_bus_config_t*
7575
7676// End copied code.
7777
78- static bool spi_bus_free (spi_host_device_t host_id ) {
78+ static bool _spi_bus_free (spi_host_device_t host_id ) {
7979 return spi_bus_get_attr (host_id ) == NULL ;
8080}
8181
82+ static void spi_interrupt_handler (void * arg ) {
83+
84+ }
85+
8286void common_hal_busio_spi_construct (busio_spi_obj_t * self ,
8387 const mcu_pin_obj_t * clock , const mcu_pin_obj_t * mosi ,
8488 const mcu_pin_obj_t * miso ) {
@@ -90,21 +94,21 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
9094 bus_config .quadhd_io_num = -1 ;
9195 bus_config .max_transfer_sz = 0 ; // Uses the default
9296 bus_config .flags = SPICOMMON_BUSFLAG_MASTER | SPICOMMON_BUSFLAG_SCLK |
93- mosi != NULL ? SPICOMMON_BUSFLAG_MOSI : 0 |
94- miso != NULL ? SPICOMMON_BUSFLAG_MISO : 0 ;
97+ ( mosi != NULL ? SPICOMMON_BUSFLAG_MOSI : 0 ) |
98+ ( miso != NULL ? SPICOMMON_BUSFLAG_MISO : 0 ) ;
9599 bus_config .intr_flags = 0 ;
96100
97101 // RAM and Flash is often on SPI1 and is unsupported by the IDF so use it as
98102 // a flag value.
99103 spi_host_device_t host_id = SPI1_HOST ;
100104 self -> connected_through_gpio = true;
101105 // Try and save SPI2 for pins that are on the IOMUX
102- if (bus_uses_iomux_pins (SPI2_HOST , & bus_config ) && spi_bus_free (SPI2_HOST )) {
106+ if (bus_uses_iomux_pins (SPI2_HOST , & bus_config ) && _spi_bus_free (SPI2_HOST )) {
103107 host_id = SPI2_HOST ;
104108 self -> connected_through_gpio = false;
105- } else if (spi_bus_free (SPI3_HOST )) {
109+ } else if (_spi_bus_free (SPI3_HOST )) {
106110 host_id = SPI3_HOST ;
107- } else if (spi_bus_free (SPI2_HOST )) {
111+ } else if (_spi_bus_free (SPI2_HOST )) {
108112 host_id = SPI2_HOST ;
109113 }
110114 if (host_id == SPI1_HOST ) {
@@ -114,21 +118,21 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
114118 esp_err_t result = spi_bus_initialize (host_id , & bus_config , 0 /* dma channel */ );
115119 if (result == ESP_ERR_NO_MEM ) {
116120 mp_raise_msg (& mp_type_MemoryError , translate ("ESP-IDF memory allocation failed" ));
117- } else if (result = ESP_INVALID_ARG ) {
121+ } else if (result == ESP_ERR_INVALID_ARG ) {
118122 mp_raise_ValueError (translate ("Invalid pins" ));
119123 }
120124 spi_bus_lock_dev_config_t config = { .flags = 0 };
121125 result = spi_bus_lock_register_dev (spi_bus_get_attr (host_id )-> lock ,
122- spi_bus_lock_dev_config_t * config ,
126+ & config ,
123127 & self -> lock );
124128 if (result == ESP_ERR_NO_MEM ) {
125129 mp_raise_msg (& mp_type_MemoryError , translate ("ESP-IDF memory allocation failed" ));
126130 }
127131
128132
129- err = esp_intr_alloc (spicommon_irqsource_for_host (host_id ),
130- bus_config .intr_flags | ESP_INTR_FLAG_INTRDISABLED ,
131- spi_interrupt_handler , self , & self -> intr );
133+ result = esp_intr_alloc (spicommon_irqsource_for_host (host_id ),
134+ bus_config .intr_flags | ESP_INTR_FLAG_INTRDISABLED ,
135+ spi_interrupt_handler , self , & self -> interrupt );
132136 if (result == ESP_ERR_NO_MEM ) {
133137 mp_raise_msg (& mp_type_MemoryError , translate ("ESP-IDF memory allocation failed" ));
134138 }
@@ -198,18 +202,21 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
198202 bits == self -> bits ) {
199203 return true;
200204 }
201- self -> hal_context -> mode = polarity << 1 | phase ;
205+ self -> hal_context . mode = polarity << 1 | phase ;
202206 self -> polarity = polarity ;
203207 self -> phase = phase ;
204208 self -> bits = bits ;
205209 self -> target_frequency = baudrate ;
206- esp_err_t result = spi_hal_get_clock_conf (self -> hal_context ,
210+ esp_err_t result = spi_hal_get_clock_conf (& self -> hal_context ,
207211 self -> target_frequency ,
208212 128 /* duty_cycle */ ,
209213 self -> connected_through_gpio ,
210214 0 /* input_delay_ns */ ,
211215 & self -> real_frequency ,
212216 & self -> timing_conf );
217+ if (result != ESP_OK ) {
218+ return false;
219+ }
213220
214221 spi_hal_setup_device (& self -> hal_context );
215222 return true;
@@ -222,9 +229,9 @@ bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
222229 return false;
223230 }
224231 // Wait to grab the lock from another task.
225- esp_err_t ret = spi_bus_lock_acquire_start (self -> lock , portMAX_DELAY );
226- self -> has_lock = true ;
227- return true ;
232+ esp_err_t result = spi_bus_lock_acquire_start (self -> lock , portMAX_DELAY );
233+ self -> has_lock = result == ESP_OK ;
234+ return self -> has_lock ;
228235}
229236
230237bool common_hal_busio_spi_has_lock (busio_spi_obj_t * self ) {
@@ -238,62 +245,37 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
238245
239246bool common_hal_busio_spi_write (busio_spi_obj_t * self ,
240247 const uint8_t * data , size_t len ) {
241- if (len == 0 ) {
242- return true;
243- }
244- // int32_t status;
245- if (len >= 16 ) {
246- // status = sercom_dma_write(self->spi_desc.dev.prvt, data, len);
247- } else {
248- // struct io_descriptor *spi_io;
249- // spi_m_sync_get_io_descriptor(&self->spi_desc, &spi_io);
250- // status = spi_io->write(spi_io, data, len);
251- }
252- return false; // Status is number of chars read or an error code < 0.
248+ return common_hal_busio_spi_transfer (self , data , NULL , len );
253249}
254250
255251bool common_hal_busio_spi_read (busio_spi_obj_t * self ,
256252 uint8_t * data , size_t len , uint8_t write_value ) {
257- if (len == 0 ) {
258- return true;
259- }
260- // int32_t status;
261- if (len >= 16 ) {
262- // status = sercom_dma_read(self->spi_desc.dev.prvt, data, len, write_value);
263- } else {
264- // self->spi_desc.dev.dummy_byte = write_value;
265-
266- // struct io_descriptor *spi_io;
267- // spi_m_sync_get_io_descriptor(&self->spi_desc, &spi_io);
268-
269- // status = spi_io->read(spi_io, data, len);
270- }
271- return false; // Status is number of chars read or an error code < 0.
253+ return common_hal_busio_spi_transfer (self , NULL , data , len );
272254}
273255
274- bool common_hal_busio_spi_transfer (busio_spi_obj_t * self , uint8_t * data_out , uint8_t * data_in , size_t len ) {
256+ bool common_hal_busio_spi_transfer (busio_spi_obj_t * self , const uint8_t * data_out , uint8_t * data_in , size_t len ) {
275257 if (len == 0 ) {
276258 return true;
277259 }
278260
279261 spi_hal_context_t * hal = & self -> hal_context ;
280- hal -> tx_bitlen = len * 8 ;
281- hal -> rx_bitlen = len * 8 ;
282- hal -> send_buffer = data_out ;
262+ hal -> tx_bitlen = len * self -> bits ;
263+ hal -> rx_bitlen = len * self -> bits ;
264+ hal -> send_buffer = ( uint8_t * ) data_out ;
283265 hal -> rcv_buffer = data_in ;
284266
285267 spi_hal_setup_trans (hal );
286268 spi_hal_prepare_data (hal );
287269 spi_hal_user_start (hal );
288- if (len >= 16 && false) {
270+ if (len >= SOC_SPI_MAXIMUM_BUFFER_SIZE && false) {
289271 // Set up the interrupt and wait on the lock.
290272 } else {
291273 while (!spi_hal_usr_is_done (hal )) {
292- RUN_BACKGROUND_TASKS () ;
274+ RUN_BACKGROUND_TASKS ;
293275 }
294276 }
295277
296- return false ;
278+ return true ;
297279}
298280
299281uint32_t common_hal_busio_spi_get_frequency (busio_spi_obj_t * self ) {
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