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2 | 2 | ****************************************************************************** |
3 | 3 | * @file stm32f7xx_hal.h |
4 | 4 | * @author MCD Application Team |
5 | | - * @version V1.0.1 |
6 | | - * @date 25-June-2015 |
| 5 | + * @version V1.1.2 |
| 6 | + * @date 23-September-2016 |
7 | 7 | * @brief This file contains all the functions prototypes for the HAL |
8 | 8 | * module driver. |
9 | 9 | ****************************************************************************** |
10 | 10 | * @attention |
11 | 11 | * |
12 | | - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| 12 | + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
13 | 13 | * |
14 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
15 | 15 | * are permitted provided that the following conditions are met: |
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57 | 57 |
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58 | 58 | /* Exported types ------------------------------------------------------------*/ |
59 | 59 | /* Exported constants --------------------------------------------------------*/ |
| 60 | +/** @defgroup SYSCFG_Exported_Constants SYSCFG Exported Constants |
| 61 | + * @{ |
| 62 | + */ |
| 63 | + |
| 64 | +/** @defgroup SYSCFG_BootMode Boot Mode |
| 65 | + * @{ |
| 66 | + */ |
| 67 | +#define SYSCFG_MEM_BOOT_ADD0 ((uint32_t)0x00000000U) |
| 68 | +#define SYSCFG_MEM_BOOT_ADD1 SYSCFG_MEMRMP_MEM_BOOT |
| 69 | +/** |
| 70 | + * @} |
| 71 | + */ |
| 72 | + |
| 73 | +/** |
| 74 | + * @} |
| 75 | + */ |
| 76 | + |
60 | 77 | /* Exported macro ------------------------------------------------------------*/ |
61 | 78 | /** @defgroup HAL_Exported_Macros HAL Exported Macros |
62 | 79 | * @{ |
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125 | 142 | #define __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_SWP_FMC);\ |
126 | 143 | SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_SWP_FMC_0);\ |
127 | 144 | }while(0); |
| 145 | +/** |
| 146 | + * @brief Return the memory boot mapping as configured by user. |
| 147 | + * @retval The boot mode as configured by user. The returned value can be one |
| 148 | + * of the following values: |
| 149 | + * @arg @ref SYSCFG_MEM_BOOT_ADD0 |
| 150 | + * @arg @ref SYSCFG_MEM_BOOT_ADD1 |
| 151 | + */ |
| 152 | +#define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_BOOT) |
| 153 | + |
| 154 | +#if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) |
| 155 | +/** @brief SYSCFG Break Cortex-M7 Lockup lock. |
| 156 | + * Enable and lock the connection of Cortex-M7 LOCKUP (Hardfault) output to TIM1/8 Break input. |
| 157 | + * @note The selected configuration is locked and can be unlocked only by system reset. |
| 158 | + */ |
| 159 | +#define __HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CBR, SYSCFG_CBR_CLL) |
| 160 | + |
| 161 | +/** @brief SYSCFG Break PVD lock. |
| 162 | + * Enable and lock the PVD connection to Timer1/8 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register. |
| 163 | + * @note The selected configuration is locked and can be unlocked only by system reset. |
| 164 | + */ |
| 165 | +#define __HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CBR, SYSCFG_CBR_PVDL) |
| 166 | +#endif /* STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ |
| 167 | + |
128 | 168 | /** |
129 | 169 | * @} |
130 | 170 | */ |
@@ -168,6 +208,10 @@ void HAL_EnableCompensationCell(void); |
168 | 208 | void HAL_DisableCompensationCell(void); |
169 | 209 | void HAL_EnableFMCMemorySwapping(void); |
170 | 210 | void HAL_DisableFMCMemorySwapping(void); |
| 211 | +#if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx) |
| 212 | +void HAL_EnableMemorySwappingBank(void); |
| 213 | +void HAL_DisableMemorySwappingBank(void); |
| 214 | +#endif /* STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */ |
171 | 215 | /** |
172 | 216 | * @} |
173 | 217 | */ |
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