@@ -59,16 +59,16 @@ static supervisor_allocation* supervisor_cache = NULL;
5959static bool wait_for_flash_ready (void ) {
6060 bool ok = true;
6161 // Both the write enable and write in progress bits should be low.
62- #ifdef EXTERNAL_FLASH_QSPI_SINGLE
62+ if ( flash_device -> no_ready_bit ){
6363 // For NVM without a ready bit in status register
6464 return ok ;
65- # else
65+ } else {
6666 uint8_t read_status_response [1 ] = {0x00 };
6767 do {
6868 ok = spi_flash_read_command (CMD_READ_STATUS , read_status_response , 1 );
6969 } while (ok && (read_status_response [0 ] & 0x3 ) != 0 );
7070 return ok ;
71- #endif
71+ }
7272}
7373
7474// Turn on the write enable bit so we can program and erase the flash.
@@ -96,7 +96,8 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len
9696 }
9797 // Don't bother writing if the data is all 1s. Thats equivalent to the flash
9898 // state after an erase.
99- #ifndef EXTERNAL_FLASH_QSPI_SINGLE
99+ if (!flash_device -> no_erase_cmd ){
100+ // Only do this if the device has an erase command
100101 bool all_ones = true;
101102 for (uint16_t i = 0 ; i < data_length ; i ++ ) {
102103 if (data [i ] != 0xff ) {
@@ -107,7 +108,7 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len
107108 if (all_ones ) {
108109 return true;
109110 }
110- #endif
111+ }
111112
112113 for (uint32_t bytes_written = 0 ;
113114 bytes_written < data_length ;
@@ -127,42 +128,55 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len
127128static bool page_erased (uint32_t sector_address ) {
128129 // Check the first few bytes to catch the common case where there is data
129130 // without using a bunch of memory.
130- uint8_t short_buffer [4 ];
131- if (read_flash (sector_address , short_buffer , 4 )) {
132- for (uint16_t i = 0 ; i < 4 ; i ++ ) {
133- if (short_buffer [i ] != 0xff ) {
134- return false;
131+ if (flash_device -> no_erase_cmd ){
132+ // skip this if device doesn't have an erase command.
133+ return true;
134+ } else {
135+ uint8_t short_buffer [4 ];
136+ if (read_flash (sector_address , short_buffer , 4 )) {
137+ for (uint16_t i = 0 ; i < 4 ; i ++ ) {
138+ if (short_buffer [i ] != 0xff ) {
139+ return false;
140+ }
135141 }
142+ } else {
143+ return false;
136144 }
137- } else {
138- return false;
139- }
140145
141- // Now check the full length.
142- uint8_t full_buffer [FILESYSTEM_BLOCK_SIZE ];
143- if (read_flash (sector_address , full_buffer , FILESYSTEM_BLOCK_SIZE )) {
144- for (uint16_t i = 0 ; i < FILESYSTEM_BLOCK_SIZE ; i ++ ) {
145- if (short_buffer [i ] != 0xff ) {
146- return false;
146+ // Now check the full length.
147+ uint8_t full_buffer [FILESYSTEM_BLOCK_SIZE ];
148+ if (read_flash (sector_address , full_buffer , FILESYSTEM_BLOCK_SIZE )) {
149+ for (uint16_t i = 0 ; i < FILESYSTEM_BLOCK_SIZE ; i ++ ) {
150+ if (short_buffer [i ] != 0xff ) {
151+ return false;
152+ }
147153 }
154+ } else {
155+ return false;
148156 }
149- } else {
150- return false;
157+ return true;
151158 }
152- return true;
153159}
154160
155161// Erases the given sector. Make sure you copied all of the data out of it you
156162// need! Also note, sector_address is really 24 bits.
157163static bool erase_sector (uint32_t sector_address ) {
158164 // Before we erase the sector we need to wait for any writes to finish and
159165 // and then enable the write again.
160- if (!wait_for_flash_ready () || !write_enable ()) {
161- return false;
166+ if (flash_device -> no_erase_cmd ){
167+ // skip this if device doesn't have an erase command.
168+ return true;
169+ } else {
170+ if (!wait_for_flash_ready () || !write_enable ()) {
171+ return false;
172+ }
173+ if (flash_device -> no_erase_cmd ) {
174+ return true;
175+ } else {
176+ spi_flash_sector_command (CMD_SECTOR_ERASE , sector_address );
177+ return true;
178+ }
162179 }
163-
164- spi_flash_sector_command (CMD_SECTOR_ERASE , sector_address );
165- return true;
166180}
167181
168182// Sector is really 24 bits.
@@ -198,20 +212,31 @@ void supervisor_flash_init(void) {
198212
199213 spi_flash_init ();
200214
201- #ifdef EXTERNAL_FLASH_QSPI_SINGLE
202- // For NVM that don't have JEDEC response
203- spi_flash_command (CMD_WAKE );
204- for (uint8_t i = 0 ; i < EXTERNAL_FLASH_DEVICE_COUNT ; i ++ ) {
205- const external_flash_device * possible_device = & possible_devices [i ];
215+ #ifdef EXTERNAL_FLASH_NO_JEDEC
216+ // For NVM that don't have JEDEC response
217+ spi_flash_command (CMD_WAKE );
218+ for (uint8_t i = 0 ; i < EXTERNAL_FLASH_DEVICE_COUNT ; i ++ ) {
219+ const external_flash_device * possible_device = & possible_devices [i ];
220+ flash_device = possible_device ;
221+ break ;
222+ }
223+ #else
224+ // The response will be 0xff if the flash needs more time to start up.
225+ uint8_t jedec_id_response [3 ] = {0xff , 0xff , 0xff };
226+ while (jedec_id_response [0 ] == 0xff ) {
227+ spi_flash_read_command (CMD_READ_JEDEC_ID , jedec_id_response , 3 );
228+ }
229+
230+ for (uint8_t i = 0 ; i < EXTERNAL_FLASH_DEVICE_COUNT ; i ++ ) {
231+ const external_flash_device * possible_device = & possible_devices [i ];
232+ if (jedec_id_response [0 ] == possible_device -> manufacturer_id &&
233+ jedec_id_response [1 ] == possible_device -> memory_type &&
234+ jedec_id_response [2 ] == possible_device -> capacity ) {
206235 flash_device = possible_device ;
207236 break ;
237+ }
208238 }
209- #else
210- // The response will be 0xff if the flash needs more time to start up.
211- uint8_t jedec_id_response [3 ] = {0xff , 0xff , 0xff };
212- while (jedec_id_response [0 ] == 0xff ) {
213- spi_flash_read_command (CMD_READ_JEDEC_ID , jedec_id_response , 3 );
214- }
239+ #endif
215240
216241 for (uint8_t i = 0 ; i < EXTERNAL_FLASH_DEVICE_COUNT ; i ++ ) {
217242 const external_flash_device * possible_device = & possible_devices [i ];
@@ -227,20 +252,23 @@ void supervisor_flash_init(void) {
227252 return ;
228253 }
229254
230- // We don't know what state the flash is in so wait for any remaining writes and then reset.
231- uint8_t read_status_response [1 ] = {0x00 };
232- // The write in progress bit should be low.
233- do {
234- spi_flash_read_command (CMD_READ_STATUS , read_status_response , 1 );
235- } while ((read_status_response [0 ] & 0x1 ) != 0 );
236- #ifndef EXTERNAL_FLASH_QSPI_SINGLE
255+ // We don't know what state the flash is in so wait for any remaining writes and then reset.
256+ uint8_t read_status_response [1 ] = {0x00 };
257+ // The write in progress bit should be low.
258+ do {
259+ spi_flash_read_command (CMD_READ_STATUS , read_status_response , 1 );
260+ } while ((read_status_response [0 ] & 0x1 ) != 0 );
261+
262+ if (!(flash_device -> no_reset_cmd )){
237263 // The suspended write/erase bit should be low.
238264 do {
239265 spi_flash_read_command (CMD_READ_STATUS2 , read_status_response , 1 );
240266 } while ((read_status_response [0 ] & 0x80 ) != 0 );
267+ } else {
241268 spi_flash_command (CMD_ENABLE_RESET );
242269 spi_flash_command (CMD_RESET );
243- #endif
270+ }
271+
244272 // Wait 30us for the reset
245273 common_hal_mcu_delay_us (30 );
246274
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