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dhalbertdhalbert
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Merge branch 'master' into nrf52_uart_io
2 parents a47eaa5 + 86ae707 commit 6049776

8 files changed

Lines changed: 82 additions & 75 deletions

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‎locale/circuitpython.pot‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2007,19 +2007,19 @@ msgstr ""
20072007
msgid "Buffer must be at least length 1"
20082008
msgstr ""
20092009

2010-
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:168
2010+
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:175
20112011
msgid "Invalid polarity"
20122012
msgstr ""
20132013

2014-
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:172
2014+
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:179
20152015
msgid "Invalid phase"
20162016
msgstr ""
20172017

2018-
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:176
2018+
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:183
20192019
msgid "Invalid number of bits"
20202020
msgstr ""
20212021

2022-
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:341
2022+
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:348
20232023
msgid "buffer slices must be of equal length"
20242024
msgstr ""
20252025

‎locale/de_DE.po‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2020,19 +2020,19 @@ msgstr ""
20202020
msgid "Buffer must be at least length 1"
20212021
msgstr ""
20222022

2023-
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:168
2023+
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:175
20242024
msgid "Invalid polarity"
20252025
msgstr ""
20262026

2027-
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:172
2027+
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:179
20282028
msgid "Invalid phase"
20292029
msgstr ""
20302030

2031-
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:176
2031+
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:183
20322032
msgid "Invalid number of bits"
20332033
msgstr ""
20342034

2035-
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:341
2035+
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:348
20362036
msgid "buffer slices must be of equal length"
20372037
msgstr ""
20382038

‎locale/en_US.po‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2007,19 +2007,19 @@ msgstr ""
20072007
msgid "Buffer must be at least length 1"
20082008
msgstr ""
20092009

2010-
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:168
2010+
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:175
20112011
msgid "Invalid polarity"
20122012
msgstr ""
20132013

2014-
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:172
2014+
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:179
20152015
msgid "Invalid phase"
20162016
msgstr ""
20172017

2018-
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:176
2018+
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:183
20192019
msgid "Invalid number of bits"
20202020
msgstr ""
20212021

2022-
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:341
2022+
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:348
20232023
msgid "buffer slices must be of equal length"
20242024
msgstr ""
20252025

‎locale/es.po‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2053,19 +2053,19 @@ msgstr ""
20532053
msgid "Buffer must be at least length 1"
20542054
msgstr ""
20552055

2056-
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:168
2056+
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:175
20572057
msgid "Invalid polarity"
20582058
msgstr ""
20592059

2060-
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:172
2060+
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:179
20612061
msgid "Invalid phase"
20622062
msgstr ""
20632063

2064-
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:176
2064+
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:183
20652065
msgid "Invalid number of bits"
20662066
msgstr ""
20672067

2068-
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:341
2068+
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:348
20692069
msgid "buffer slices must be of equal length"
20702070
msgstr ""
20712071

‎locale/fil.po‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -745,7 +745,7 @@ msgstr "hindi sinusuportahan ang bytes > 8 bits"
745745
#: ports/nrf/common-hal/busio/UART.c:364
746746
#, fuzzy
747747
msgid "busio.UART not available"
748-
msgstr "hindi pa implemented ang busio.UART"
748+
msgstr ""
749749

750750
#: ports/nrf/common-hal/microcontroller/Processor.c:49
751751
#, c-format
@@ -2050,19 +2050,19 @@ msgstr "Function nangangailangan ng lock"
20502050
msgid "Buffer must be at least length 1"
20512051
msgstr "Buffer dapat ay hindi baba sa 1 na haba"
20522052

2053-
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:168
2053+
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:175
20542054
msgid "Invalid polarity"
20552055
msgstr "Mali ang polarity"
20562056

2057-
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:172
2057+
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:179
20582058
msgid "Invalid phase"
20592059
msgstr "Mali ang phase"
20602060

2061-
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:176
2061+
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:183
20622062
msgid "Invalid number of bits"
20632063
msgstr "Mali ang bilang ng bits"
20642064

2065-
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:341
2065+
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:348
20662066
msgid "buffer slices must be of equal length"
20672067
msgstr "aarehas na haba dapat ang buffer slices"
20682068

‎locale/fr.po‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -741,7 +741,7 @@ msgstr "octets > 8 bits non supporté"
741741
#: ports/nrf/common-hal/busio/UART.c:364
742742
#, fuzzy
743743
msgid "busio.UART not available"
744-
msgstr "busio.UART pas encore implémenté"
744+
msgstr "busio.UART n'est pas disponible"
745745

746746
#: ports/nrf/common-hal/microcontroller/Processor.c:49
747747
#, c-format
@@ -2041,19 +2041,19 @@ msgstr "La fonction nécessite un verrou"
20412041
msgid "Buffer must be at least length 1"
20422042
msgstr "Le tampon doit être de longueur au moins 1"
20432043

2044-
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:168
2044+
#: shared-bindings/bitbangio/SPI.c:151 shared-bindings/busio/SPI.c:175
20452045
msgid "Invalid polarity"
20462046
msgstr "Polarité invalide"
20472047

2048-
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:172
2048+
#: shared-bindings/bitbangio/SPI.c:155 shared-bindings/busio/SPI.c:179
20492049
msgid "Invalid phase"
20502050
msgstr "Phase invalide"
20512051

2052-
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:176
2052+
#: shared-bindings/bitbangio/SPI.c:159 shared-bindings/busio/SPI.c:183
20532053
msgid "Invalid number of bits"
20542054
msgstr "Nombre de bits invalide"
20552055

2056-
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:341
2056+
#: shared-bindings/bitbangio/SPI.c:284 shared-bindings/busio/SPI.c:348
20572057
msgid "buffer slices must be of equal length"
20582058
msgstr "les slices de tampon doivent être de longueurs égales"
20592059

‎ports/nrf/common-hal/busio/SPI.c‎

Lines changed: 45 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -65,40 +65,40 @@ void spi_reset(void) {
6565
}
6666
}
6767

68-
// Convert frequency to clock-speed-dependent value
68+
// Convert frequency to clock-speed-dependent value. Choose the next lower baudrate if in between
69+
// available baudrates.
6970
static nrf_spim_frequency_t baudrate_to_spim_frequency(const uint32_t baudrate) {
70-
if (baudrate <= 125000) {
71-
return NRF_SPIM_FREQ_125K;
72-
}
73-
if (baudrate <= 250000) {
74-
return NRF_SPIM_FREQ_250K;
75-
}
76-
if (baudrate <= 500000) {
77-
return NRF_SPIM_FREQ_500K;
78-
}
79-
if (baudrate <= 1000000) {
80-
return NRF_SPIM_FREQ_1M;
81-
}
82-
if (baudrate <= 2000000) {
83-
return NRF_SPIM_FREQ_2M;
84-
}
85-
if (baudrate <= 4000000) {
86-
return NRF_SPIM_FREQ_4M;
87-
}
88-
if (baudrate <= 8000000) {
89-
return NRF_SPIM_FREQ_8M;
90-
}
91-
#ifdef SPIM_FREQUENCY_FREQUENCY_M16
92-
if (baudrate <= 16000000) {
93-
return NRF_SPIM_FREQ_16M;
94-
}
95-
#endif
9671

72+
static const struct {
73+
const uint32_t boundary;
74+
nrf_spim_frequency_t spim_frequency;
75+
} baudrate_map[] = {
9776
#ifdef SPIM_FREQUENCY_FREQUENCY_M32
98-
return NRF_SPIM_FREQ_32M;
99-
#else
100-
return NRF_SPIM_FREQ_8M;
77+
{ 32000000, NRF_SPIM_FREQ_32M },
78+
#endif
79+
#ifdef SPIM_FREQUENCY_FREQUENCY_M16
80+
{ 16000000, NRF_SPIM_FREQ_16M },
10181
#endif
82+
{ 8000000, NRF_SPIM_FREQ_8M },
83+
{ 4000000, NRF_SPIM_FREQ_4M },
84+
{ 2000000, NRF_SPIM_FREQ_2M },
85+
{ 1000000, NRF_SPIM_FREQ_1M },
86+
{ 500000, NRF_SPIM_FREQ_500K },
87+
{ 250000, NRF_SPIM_FREQ_250K },
88+
{ 0, NRF_SPIM_FREQ_125K },
89+
};
90+
91+
size_t i = 0;
92+
uint32_t boundary;
93+
do {
94+
boundary = baudrate_map[i].boundary;
95+
if (baudrate >= boundary) {
96+
return baudrate_map[i].spim_frequency;
97+
}
98+
i++;
99+
} while (boundary != 0);
100+
// Should not get here.
101+
return 0;
102102
}
103103

104104
void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * clock, const mcu_pin_obj_t * mosi, const mcu_pin_obj_t * miso) {
@@ -168,26 +168,26 @@ void common_hal_busio_spi_deinit(busio_spi_obj_t *self) {
168168
}
169169

170170
bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
171-
// nrf52 does not support 16 bit
172-
if (bits != 8)
171+
// nrf52 does not support 16 bit
172+
if (bits != 8) {
173173
return false;
174+
}
174175

175-
if (baudrate > self->spim_peripheral->max_frequency_MHz * 1000000) {
176-
mp_raise_ValueError(translate("Baud rate too high for this SPI peripheral"));
177-
return false;
178-
}
179-
nrf_spim_frequency_set(self->spim_peripheral->spim.p_reg, baudrate_to_spim_frequency(baudrate));
176+
// Set desired frequency, rounding down, and don't go above available frequency for this SPIM.
177+
nrf_spim_frequency_set(self->spim_peripheral->spim.p_reg,
178+
baudrate_to_spim_frequency(MIN(baudrate,
179+
self->spim_peripheral->max_frequency_MHz * 1000000)));
180180

181-
nrf_spim_mode_t mode = NRF_SPIM_MODE_0;
182-
if (polarity) {
183-
mode = (phase) ? NRF_SPIM_MODE_3 : NRF_SPIM_MODE_2;
184-
} else {
185-
mode = (phase) ? NRF_SPIM_MODE_1 : NRF_SPIM_MODE_0;
186-
}
181+
nrf_spim_mode_t mode = NRF_SPIM_MODE_0;
182+
if (polarity) {
183+
mode = (phase) ? NRF_SPIM_MODE_3 : NRF_SPIM_MODE_2;
184+
} else {
185+
mode = (phase) ? NRF_SPIM_MODE_1 : NRF_SPIM_MODE_0;
186+
}
187187

188-
nrf_spim_configure(self->spim_peripheral->spim.p_reg, mode, NRF_SPIM_BIT_ORDER_MSB_FIRST);
188+
nrf_spim_configure(self->spim_peripheral->spim.p_reg, mode, NRF_SPIM_BIT_ORDER_MSB_FIRST);
189189

190-
return true;
190+
return true;
191191
}
192192

193193
bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {

‎shared-bindings/busio/SPI.c‎

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -136,19 +136,26 @@ static void check_lock(busio_spi_obj_t *self) {
136136

137137
//| .. method:: SPI.configure(\*, baudrate=100000, polarity=0, phase=0, bits=8)
138138
//|
139-
//| Configures the SPI bus. Only valid when locked.
139+
//| Configures the SPI bus. The SPI object must be locked.
140140
//|
141141
//| :param int baudrate: the desired clock rate in Hertz. The actual clock rate may be higher or lower
142142
//| due to the granularity of available clock settings.
143143
//| Check the `frequency` attribute for the actual clock rate.
144-
//| **Note:** on the SAMD21, it is possible to set the baud rate to 24 MHz, but that
145-
//| speed is not guaranteed to work. 12 MHz is the next available lower speed, and is
146-
//| within spec for the SAMD21.
147144
//| :param int polarity: the base state of the clock line (0 or 1)
148145
//| :param int phase: the edge of the clock that data is captured. First (0)
149146
//| or second (1). Rising or falling depends on clock polarity.
150147
//| :param int bits: the number of bits per word
151148
//|
149+
//| .. note:: On the SAMD21, it is possible to set the baudrate to 24 MHz, but that
150+
//| speed is not guaranteed to work. 12 MHz is the next available lower speed, and is
151+
//| within spec for the SAMD21.
152+
//|
153+
//| .. note:: On the nRF52832, these baudrates are available: 125kHz, 250kHz, 1MHz, 2MHz, 4MHz,
154+
//| and 8MHz. On the nRF52840, 16MHz and 32MHz are also available, but only on the first
155+
//| `busio.SPI` object you create. Two more ``busio.SPI`` objects can be created, but they are restricted
156+
//| to 8MHz maximum. This is a hardware restriction: there is only one high-speed SPI peripheral.
157+
//| If you pick a a baudrate other than one of these, the nearest lower
158+
//| baudrate will be chosen, with a minimum of 125kHz.
152159
STATIC mp_obj_t busio_spi_configure(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
153160
enum { ARG_baudrate, ARG_polarity, ARG_phase, ARG_bits };
154161
static const mp_arg_t allowed_args[] = {

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