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jeplerjepler
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canio: Fix implementation bugs in atmel-sam
1 parent 10245c0 commit 59580d0

4 files changed

Lines changed: 24 additions & 25 deletions

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‎ports/atmel-samd/common-hal/canio/CAN.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -176,7 +176,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc
176176

177177
{
178178
CAN_TXBC_Type bc = {
179-
.bit.TBSA = (uint32_t)self->state->tx_fifo,
179+
.bit.TBSA = (uint32_t)self->state->tx_buffer,
180180
.bit.NDTB = COMMON_HAL_CANIO_TX_FIFO_SIZE,
181181
.bit.TFQM = 0, // Messages are transmitted in the order submitted
182182
};
@@ -192,7 +192,7 @@ void common_hal_canio_can_construct(canio_can_obj_t *self, mcu_pin_obj_t *tx, mc
192192

193193
{
194194
CAN_GFC_Type gfc = {
195-
.bit.RRFE = 1,
195+
.bit.RRFE = 0,
196196
.bit.ANFS = CAN_GFC_ANFS_REJECT_Val,
197197
.bit.ANFE = CAN_GFC_ANFE_REJECT_Val,
198198
};
@@ -333,13 +333,13 @@ void common_hal_canio_can_send(canio_can_obj_t *self, canio_message_obj_t *messa
333333
maybe_auto_restart(self);
334334

335335
// We have just one dedicated TX buffer, use it!
336-
canio_can_fifo_t *ent = &self->state->tx_fifo[0];
336+
canio_can_tx_buffer_t *ent = &self->state->tx_buffer[0];
337337

338338
ent->txb0.bit.ESI = false;
339339
ent->txb0.bit.XTD = message->extended;
340340
ent->txb0.bit.RTR = message->rtr;
341341
if (message->extended) {
342-
ent->txb0.bit.ID = message->id << 18;
342+
ent->txb0.bit.ID = message->id;
343343
} else {
344344
ent->txb0.bit.ID = message->id << 18; // short addresses are left-justified
345345
}

‎ports/atmel-samd/common-hal/canio/Listener.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -358,15 +358,15 @@ bool common_hal_canio_listener_readinto(canio_listener_obj_t *self, canio_messag
358358
} while (!common_hal_canio_listener_in_waiting(self));
359359
}
360360
int index = self->hw->RXFS.bit.F0GI;
361-
canio_can_fifo_t *hw_message = &self->fifo[index];
362-
message->extended = hw_message->rxb0.bit.XTD;
361+
canio_can_rx_fifo_t *hw_message = &self->fifo[index];
362+
message->extended = hw_message->rxf0.bit.XTD;
363363
if (message->extended) {
364-
message->id = hw_message->rxb0.bit.ID;
364+
message->id = hw_message->rxf0.bit.ID;
365365
} else {
366-
message->id = hw_message->rxb0.bit.ID >> 18; // short addresses are left-justified
366+
message->id = hw_message->rxf0.bit.ID >> 18; // short addresses are left-justified
367367
}
368-
message->rtr = hw_message->rxb0.bit.RTR;
369-
message->size = hw_message->rxb1.bit.DLC;
368+
message->rtr = hw_message->rxf0.bit.RTR;
369+
message->size = hw_message->rxf1.bit.DLC;
370370
if (!message->rtr) {
371371
memcpy(message->data, hw_message->data, message->size);
372372
}

‎ports/atmel-samd/common-hal/canio/Listener.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ typedef struct {
3838
typedef struct {
3939
mp_obj_base_t base;
4040
canio_can_obj_t *can;
41-
canio_can_fifo_t *fifo;
41+
canio_can_rx_fifo_t *fifo;
4242
canio_rxfifo_reg_t *hw;
4343
uint32_t timeout_ms;
4444
uint8_t fifo_idx;

‎ports/atmel-samd/common-hal/canio/__init__.h‎

Lines changed: 13 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -42,26 +42,25 @@ typedef struct canio_listener canio_listener_t;
4242
typedef struct canio_can canio_can_t;
4343

4444
typedef struct {
45-
union {
46-
CAN_RXBE_0_Type rxb0;
47-
CAN_TXBE_0_Type txb0;
48-
CAN_RXF0E_0_Type rxf0;
49-
};
50-
union {
51-
CAN_RXBE_1_Type rxb1;
52-
CAN_TXBE_1_Type txb1;
53-
CAN_RXF0E_1_Type rxf1;
54-
};
45+
CAN_TXBE_0_Type txb0;
46+
CAN_TXBE_1_Type txb1;
5547
COMPILER_ALIGNED(4)
5648
uint8_t data[COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH];
57-
} canio_can_fifo_t;
49+
} canio_can_tx_buffer_t;
50+
51+
typedef struct {
52+
CAN_RXF0E_0_Type rxf0;
53+
CAN_RXF0E_1_Type rxf1;
54+
COMPILER_ALIGNED(4)
55+
uint8_t data[COMMON_HAL_CANIO_MAX_MESSAGE_LENGTH];
56+
} canio_can_rx_fifo_t;
5857

5958
typedef uint32_t canio_can_filter_t;
6059

6160
typedef struct {
62-
canio_can_fifo_t tx_fifo[COMMON_HAL_CANIO_TX_FIFO_SIZE];
63-
canio_can_fifo_t rx0_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE];
64-
canio_can_fifo_t rx1_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE];
61+
canio_can_tx_buffer_t tx_buffer[COMMON_HAL_CANIO_TX_FIFO_SIZE];
62+
canio_can_rx_fifo_t rx0_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE];
63+
canio_can_rx_fifo_t rx1_fifo[COMMON_HAL_CANIO_RX_FIFO_SIZE];
6564
CanMramSidfe standard_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE];
6665
CanMramXifde extended_rx_filter[COMMON_HAL_CANIO_RX_FILTER_SIZE];
6766
} canio_can_state_t;

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