Skip to content

Commit 3990dcf

Browse files
committed
docs: Add note about maximum frequency of busses.
1 parent 14fab60 commit 3990dcf

1 file changed

Lines changed: 3 additions & 0 deletions

File tree

docs/library/pyb.rst

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -113,6 +113,9 @@ Power related functions
113113
Supported sysclk frequencies are (in MHz): 8, 16, 24, 30, 32, 36, 40, 42, 48,
114114
54, 56, 60, 64, 72, 84, 96, 108, 120, 144, 168.
115115

116+
The maximum frequency of hclk is 168MHz, of pclk1 is 42MHz, and of pclk2 is
117+
84MHz. Be sure not to set frequencies above these values.
118+
116119
The hclk, pclk1 and pclk2 frequencies are derived from the sysclk frequency
117120
using a prescaler (divider). Supported prescalers for hclk are: 1, 2, 4, 8,
118121
16, 64, 128, 256, 512. Supported prescalers for pclk1 and pclk2 are: 1, 2,

0 commit comments

Comments
 (0)