@@ -154,7 +154,8 @@ void frequencyin_reference_tc_init() {
154154 if (dpll_gclk == 0xff ) {
155155 frequencyin_samd51_start_dpll ();
156156 }
157- turn_on_clocks (true, reference_tc , dpll_gclk , TC_HANDLER_FREQUENCYIN );
157+ set_timer_handler (reference_tc , dpll_gclk , TC_HANDLER_FREQUENCYIN );
158+ turn_on_clocks (true, reference_tc , dpll_gclk );
158159 #endif
159160
160161 Tc * tc = tc_insts [reference_tc ];
@@ -289,15 +290,17 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t*
289290 // SAMD21: We use GCLK0 generated from DFLL running at 48mhz
290291 // SAMD51: We use a GCLK generated from DPLL1 running at <100mhz
291292 #ifdef SAMD21
292- turn_on_clocks (true, timer_index , 0 , TC_HANDLER_NO_INTERRUPT );
293+ set_timer_handler (timer_index , 0 , TC_HANDLER_NO_INTERRUPT );
294+ turn_on_clocks (true, timer_index , 0 );
293295 #endif
294296 #ifdef SAMD51
295297 frequencyin_samd51_start_dpll ();
296298 if (dpll_gclk == 0xff && !clock_get_enabled (0 , GCLK_SOURCE_DPLL1 )) {
297299 common_hal_frequencyio_frequencyin_deinit (self );
298300 mp_raise_RuntimeError (translate ("No available clocks" ));
299301 }
300- turn_on_clocks (true, timer_index , dpll_gclk , TC_HANDLER_NO_INTERRUPT );
302+ set_timer_handler (timer_index , dpll_gclk , TC_HANDLER_NO_INTERRUPT );
303+ turn_on_clocks (true, timer_index , dpll_gclk );
301304 #endif
302305
303306 // Ensure EIC is on
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