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Fix 8 bit recordings on CPX.
The DMA trigger source was incorrect when using serializer 1 on the SAMD21. Playback register was incorrect for 8 bit as well. Now fixed.
1 parent cfea51e commit 22b7cd3

3 files changed

Lines changed: 17 additions & 3 deletions

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ports/atmel-samd/audio_dma.c

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -274,11 +274,16 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t* dma,
274274
MP_STATE_PORT(playing_audio)[dma->dma_channel] = dma->sample;
275275
}
276276

277-
dma->beat_size = 1;
278-
dma->bytes_per_sample = 1;
277+
279278
if (audiosample_bits_per_sample(sample) == 16) {
280279
dma->beat_size = 2;
281280
dma->bytes_per_sample = 2;
281+
} else {
282+
dma->beat_size = 1;
283+
dma->bytes_per_sample = 1;
284+
if (single_channel) {
285+
output_register_address += 1;
286+
}
282287
}
283288
// Transfer both channels at once.
284289
if (!single_channel && audiosample_channel_count(sample) == 2) {

ports/atmel-samd/common-hal/audiobusio/PDMIn.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -371,7 +371,12 @@ uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* se
371371
setup_dma(self, output_buffer_length, dma_descriptor(dma_channel), &second_descriptor,
372372
words_per_buffer, words_per_sample, first_buffer, second_buffer);
373373

374-
dma_configure(dma_channel, I2S_DMAC_ID_RX_0, true);
374+
uint8_t trigger_source = I2S_DMAC_ID_RX_0;
375+
#ifdef SAMD21
376+
trigger_source += self->serializer;
377+
#endif
378+
379+
dma_configure(dma_channel, trigger_source, true);
375380
init_event_channel_interrupt(event_channel, CORE_GCLK, EVSYS_ID_GEN_DMAC_CH_0 + dma_channel);
376381
dma_enable_channel(dma_channel);
377382

ports/atmel-samd/shared_dma.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -99,13 +99,17 @@ void dma_enable_channel(uint8_t channel_number) {
9999
common_hal_mcu_disable_interrupts();
100100
/** Select the DMA channel and clear software trigger */
101101
DMAC->CHID.reg = DMAC_CHID_ID(channel_number);
102+
// Clear any previous interrupts.
103+
DMAC->CHINTFLAG.reg = DMAC_CHINTFLAG_MASK;
102104
DMAC->CHCTRLA.bit.ENABLE = true;
103105
common_hal_mcu_enable_interrupts();
104106
#endif
105107

106108
#ifdef SAMD51
107109
DmacChannel* channel = &DMAC->Channel[channel_number];
108110
channel->CHCTRLA.bit.ENABLE = true;
111+
// Clear any previous interrupts.
112+
channel->CHINTFLAG.reg = DMAC_CHINTFLAG_MASK;
109113
#endif
110114
}
111115

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