@@ -30,3 +30,29 @@ following design and implementation decision were made:
3030 board may expose only subset of pins. Consult your board reference manual.
3131* Some boards may lack external pins/internal connectivity to support
3232 ESP8266 deepsleep mode.
33+
34+
35+ Technical specifications and SoC datasheets
36+ -------------------------------------------
37+
38+ The datasheets and other reference material for ESP8266 chip are available
39+ from the vendor site: http://bbs.espressif.com/viewtopic.php?f=67&t=225 .
40+ The are primary reference for the chip technical specifications, capabilities,
41+ operating modes, internal functioning, etc.
42+
43+ For your convinience, some of technical specifications are provided below:
44+
45+ * Architecture: Xtensa lx106
46+ * CPU frequency: 80MHz overclockable to 160MHz
47+ * Total RAM available: 96KB (part of it reserved for system)
48+ * BootROM: 64KB
49+ * Internal FlashROM: None
50+ * External FlashROM: code and data, via SPI Flash. Normal sizes 512KB-4MB.
51+ * GPIO: 16 + 1 (GPIOs are multiplexed with other functions, including
52+ external FlashROM, UART, deep sleep wake-up, etc.)
53+ * UART: One RX/TX UART (no hardware handshaking), one TX-only UART.
54+ * SPI: 2 SPI interfaces (one used for FlashROM).
55+ * I2C: No native extenal I2C (bitbang implementation available on any pins).
56+ * I2S: 1.
57+ * Programming: using BootROM bootloader from UART. Due to external FlashROM
58+ and always-available BootROM bootloader, ESP8266 is not brickable.
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