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[TRTLLM-9286][feat] Integration of CuteDSL NVFP4 grouped GEMM #8880
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/bot run --disable-fail-fast |
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PR_Github #24307 [ run ] triggered by Bot. Commit: |
📝 WalkthroughWalkthroughIntegrates Cute DSL (CUTLASS DSL) into TensorRT-LLM to support efficient MOE operations with FP4 quantization on Blackwell GPUs. Adds new CUDA kernels for MOE permutation, unpermutation, and activation functions, extends routing kernels with bidirectional index mapping, and provides PyTorch custom ops for grouped GEMM and fused MOE workflows. Changes
Sequence Diagram(s)sequenceDiagram
participant App as PyTorch App
participant CustomOp as cute_dsl_nvfp4_fused_moe_blackwell
participant Runner as Sm100BlockScaledFusedMoERunner
participant Sort as moe_topk_sort
participant Perm as moe_permute
participant Gemm as grouped_gemm
participant Swiglu as moe_swiglu_nvfp4_quantize
participant Unperm as moe_unpermute
App->>CustomOp: call with input, scales, experts
activate CustomOp
CustomOp->>Runner: forward(inputs, tactic)
activate Runner
rect rgb(200, 220, 255)
Note over Runner: Routing & Permutation Phase
Runner->>Sort: moe_topk_sort()
Sort-->>Runner: permuted indices, tiles
end
rect rgb(200, 220, 255)
Note over Runner: Input Preparation Phase
Runner->>Perm: moe_permute(input)
Perm-->>Runner: permuted_output
end
rect rgb(220, 200, 255)
Note over Runner: GEMM Phase
Runner->>Gemm: grouped_gemm(permuted)
Gemm-->>Runner: gemm_output
end
rect rgb(220, 220, 200)
Note over Runner: Quantization Phase
Runner->>Swiglu: moe_swiglu_nvfp4_quantize(gemm)
Swiglu-->>Runner: output, scales
end
rect rgb(200, 220, 255)
Note over Runner: De-permutation Phase
Runner->>Unperm: moe_unpermute(output)
Unperm-->>Runner: final_output
end
deactivate Runner
Runner-->>CustomOp: final_output
deactivate CustomOp
CustomOp-->>App: result
Estimated code review effort🎯 4 (Complex) | ⏱️ ~60 minutes Areas requiring extra attention:
Pre-merge checks and finishing touches❌ Failed checks (1 warning)
✅ Passed checks (2 passed)
✨ Finishing touches
🧪 Generate unit tests (beta)
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Actionable comments posted: 5
Caution
Some comments are outside the diff and can’t be posted inline due to platform limitations.
⚠️ Outside diff range comments (1)
cpp/tensorrt_llm/thop/fp4Quantize.cpp (1)
2-2: Update copyright year to include current year (2025).The copyright header shows "2020-2023" but should be updated to "2020-2025" per coding guidelines for modified files.
- * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2020-2025, NVIDIA CORPORATION. All rights reserved.
🧹 Nitpick comments (3)
cpp/tensorrt_llm/kernels/cuteDslKernels/CMakeLists.txt (1)
18-23: Consider explicit CMake dependencies.The object library configuration is functionally correct with appropriate properties for CUDA device code. However, consider these optional improvements:
- File globbing: While
GLOB_RECURSEworks, CMake best practices recommend explicit file lists so the build system can detect new/removed files automatically.- Explicit dependencies: If this target requires specific include directories or compile options, consider making them explicit rather than relying on parent scope inheritance for better modularity.
These are minor maintainability suggestions; the current implementation should work correctly.
tensorrt_llm/_torch/autotuner.py (1)
935-937: Good improvement to usecallable()overinspect.isfunction().The change from
inspect.isfunction()tocallable()is more flexible and Pythonic, accepting lambdas, class instances with__call__, and other callable objects. This aligns well with the docstring description at line 29-30.Optional refinement: Consider updating the assertion message on line 936 from "provide a opt value generation function" to "provide a callable that generates opt values" for consistency.
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cu (1)
62-71: Consider declaring runtime-const variables asconst.Variables like
kCopyPerToken(line 65) andnum_tokens(line 71) are computed once and never modified. Declaring them asconstimproves code clarity and prevents accidental modification.Apply this diff:
- int64_t const kCopyPerToken = hidden_size / kElemPerCopy; + int64_t constexpr kElemPerCopy = elemPerCopy<InputType>(); + int32_t constexpr kSFElemPerCopy = sfElemPerCopy<SFType>(); + // Need int64_t to prevent overflow when computing pointer offsets. + int64_t const kCopyPerToken = hidden_size / kElemPerCopy;And:
- int32_t const num_tokens = num_non_exiting_tiles[0] * tile_size; + int32_t const num_tokens = num_non_exiting_tiles[0] * tile_size;Note: Both variables are already marked
const, so this is already correctly implemented. No changes needed.As per coding guidelines.
📜 Review details
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Review profile: CHILL
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📒 Files selected for processing (30)
cpp/tensorrt_llm/CMakeLists.txt(1 hunks)cpp/tensorrt_llm/kernels/CMakeLists.txt(2 hunks)cpp/tensorrt_llm/kernels/cuteDslKernels/CMakeLists.txt(1 hunks)cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cu(1 hunks)cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.h(1 hunks)cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h(2 hunks)cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu(1 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cu(2 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuh(2 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.h(3 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cu(1 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cu(1 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu(3 hunks)cpp/tensorrt_llm/thop/CMakeLists.txt(1 hunks)cpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp(1 hunks)cpp/tensorrt_llm/thop/fp4Quantize.cpp(1 hunks)cpp/tensorrt_llm/thop/moeUtilOp.cpp(1 hunks)requirements.txt(1 hunks)tensorrt_llm/_torch/autotuner.py(2 hunks)tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py(4 hunks)tensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.py(1 hunks)tensorrt_llm/_torch/models/modeling_deepseekv3.py(1 hunks)tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py(7 hunks)tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py(0 hunks)tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py(0 hunks)tensorrt_llm/_torch/modules/fused_moe/fused_moe_wide_ep.py(0 hunks)tests/integration/defs/accuracy/test_llm_api_pytorch.py(3 hunks)tests/integration/test_lists/test-db/l0_b200.yml(2 hunks)tests/integration/test_lists/test-db/l0_dgx_b200.yml(2 hunks)tests/unittest/_torch/thop/parallel/test_cute_dsl_moe.py(1 hunks)
💤 Files with no reviewable changes (3)
- tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py
- tensorrt_llm/_torch/modules/fused_moe/fused_moe_wide_ep.py
- tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py
🧰 Additional context used
📓 Path-based instructions (8)
**/*.{h,hpp,hh,hxx,cpp,cxx,cc,cu,cuh}
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Files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/thop/fp4Quantize.cppcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/thop/moeUtilOp.cpp
**/*.{cpp,cxx,cc,cu,h,hpp,hh,hxx,cuh}
📄 CodeRabbit inference engine (CODING_GUIDELINES.md)
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Files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/thop/fp4Quantize.cppcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/thop/moeUtilOp.cpp
**/*.{h,hpp,hh,hxx,cpp,cxx,cc,cu,cuh,py}
📄 CodeRabbit inference engine (CODING_GUIDELINES.md)
Use only spaces, no tabs; indent with 4 spaces.
Files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutensorrt_llm/_torch/models/modeling_deepseekv3.pytensorrt_llm/_torch/autotuner.pycpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpptensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cutests/integration/defs/accuracy/test_llm_api_pytorch.pycpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/thop/fp4Quantize.cppcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cutests/unittest/_torch/thop/parallel/test_cute_dsl_moe.pycpp/tensorrt_llm/thop/moeUtilOp.cpptensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pytensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
**/*.{h,hpp,hh,hxx,cuh}
📄 CodeRabbit inference engine (CODING_GUIDELINES.md)
Use include guards named 'TRTLLM_<FILE_NAME_IN_CAPS_WITH_UNDERSCORES>_H' (no leading or trailing underscore; directory names excluded).
Files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.h
**/*.{cpp,cxx,cc,h,hpp,hh,hxx,cu,cuh,py}
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Prepend the NVIDIA Apache-2.0 copyright header with current year to the top of all source files (e.g., .cpp, .h, .cu, .py).
Files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutensorrt_llm/_torch/models/modeling_deepseekv3.pytensorrt_llm/_torch/autotuner.pycpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpptensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cutests/integration/defs/accuracy/test_llm_api_pytorch.pycpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/thop/fp4Quantize.cppcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cutests/unittest/_torch/thop/parallel/test_cute_dsl_moe.pycpp/tensorrt_llm/thop/moeUtilOp.cpptensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pytensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
**/*.{h,hpp,hh,hxx}
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Document new class interfaces and function prototypes with Doxygen; use //! for single-line and //!< for members.
Files:
cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.h
**/*.{h,hpp,hh,hxx,cpp,cxx,cc}
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**/*.{h,hpp,hh,hxx,cpp,cxx,cc}: Prefer anonymous namespaces over 'static' for internal linkage of functions.
All templates (class/function/member/static) must be instantiated at least once; non-POD classes should have private data members.
Files:
cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/thop/fp4Quantize.cppcpp/tensorrt_llm/thop/moeUtilOp.cpp
**/*.py
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**/*.py: Python code must target Python 3.8+.
Indent Python code with 4 spaces; do not use tabs.
Maintain module namespace when importing; prefer 'from package.subpackage import foo' then 'foo.SomeClass()' instead of importing the class directly.
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Files:
tensorrt_llm/_torch/models/modeling_deepseekv3.pytensorrt_llm/_torch/autotuner.pytensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.pytests/integration/defs/accuracy/test_llm_api_pytorch.pytests/unittest/_torch/thop/parallel/test_cute_dsl_moe.pytensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pytensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
🧠 Learnings (33)
📓 Common learnings
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4010-4012
Timestamp: 2025-08-14T23:23:27.449Z
Learning: For MOE (Mixture of Experts) code reviews in TensorRT-LLM, avoid repeatedly suggesting finalize fusion validation checks and safety assertions. The user djns99 has indicated these suggestions are repetitive and unwanted across multiple MOE-related changes.
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp:399-417
Timestamp: 2025-08-21T21:48:35.135Z
Learning: CUTLASS extensions in TensorRT-LLM (located under cpp/tensorrt_llm/cutlass_extensions/) are designed to integrate with and extend functionality in the external CUTLASS repository. When analyzing these extensions, their consumers and functionality wiring may exist in the CUTLASS codebase rather than within TensorRT-LLM itself.
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1475-1480
Timestamp: 2025-08-21T02:39:12.009Z
Learning: The min latency mode functionality in TensorRT-LLM MOE kernels (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu) is deprecated and no longer being maintained/updated, as confirmed by djns99. Bug reports and optimization suggestions for the computeStridesTmaWarpSpecializedLowLatencyKernel and related min latency code paths should be deprioritized.
Learnt from: ChristinaZ
Repo: NVIDIA/TensorRT-LLM PR: 7068
File: cpp/tensorrt_llm/kernels/moeTopKFuncs.cuh:169-172
Timestamp: 2025-08-20T07:43:36.447Z
Learning: In TensorRT-LLM MOE kernels, when processing up to 128 experts across 32 threads, each thread handles at most 4 experts (N < 5 constraint), where N represents candidates per thread rather than total system capacity.
Learnt from: jhaotingc
Repo: NVIDIA/TensorRT-LLM PR: 7856
File: cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp:159-166
Timestamp: 2025-09-19T21:28:13.751Z
Learning: In TensorRT-LLM blockScaleMoe routing (cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu), the DeepSeek routing method performs reinterpret_cast<float*>(routingLogits) at line 89, which could cause issues if routing_logits are BF16. However, Qwen3-FP8 models use RenormalizeNaive routing method and are not affected by this dtype casting issue.
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4616-4626
Timestamp: 2025-08-19T03:35:20.866Z
Learning: In the MOE profiler TMA workspace preparation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu), the overlapping of TMA WS regions for NONE and FINALIZE variants is deliberate design to save memory space, as confirmed by djns99. The comment "reuse the same pointers to save space" reflects this intentional behavior.
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 7520
File: tensorrt_llm/_torch/pyexecutor/resource_manager.py:605-613
Timestamp: 2025-09-24T03:31:28.908Z
Learning: In TensorRT-LLM Ray orchestrator mode, ProcessGroups are initialized with both Gloo and NCCL backends (e.g., "cuda:nccl,cpu:gloo"), allowing PyTorch distributed to automatically route CPU tensors through Gloo and GPU tensors through NCCL. This eliminates the need for manual device placement when performing allreduce operations on base types.
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_tma_warp_specialized_input.cu:118-127
Timestamp: 2025-08-09T20:57:04.084Z
Learning: In the CUTLASS MoE finalize fusion implementation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_tma_warp_specialized_input.cu), when setting `fused_finalize_epilogue.stride_final_output` with shape `(hidden_size, num_output_tokens, 1)`, the `num_rows_in_final_output` should be set to `num_output_tokens` (not `hidden_size`) because of a swap+transpose operation that maps rows of the output tensor to `hidden_size` and columns to `num_output_tokens`.
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h:999-1000
Timestamp: 2025-08-22T01:54:35.850Z
Learning: The `internal_cutlass_kernels` directory in TensorRT-LLM is a mirror of an internal NVIDIA repository and maintains its own implementation and API that may diverge from the public `cutlass_kernels` version. API inconsistencies between these two directories are intentional and by design, not bugs to be fixed.
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/thop/allreduceOp.cpp:352-446
Timestamp: 2025-09-23T15:12:38.312Z
Learning: In TensorRT-LLM NCCL device implementation, NCCL version 2.28+ requirements are handled at runtime in the nccl_device/config layer rather than with compile-time guards. This allows the allreduceOp to remain version-agnostic and delegates version compatibility validation to the appropriate lower-level components that can gracefully handle unsupported configurations.
📚 Learning: 2025-08-21T21:48:35.135Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp:399-417
Timestamp: 2025-08-21T21:48:35.135Z
Learning: CUTLASS extensions in TensorRT-LLM (located under cpp/tensorrt_llm/cutlass_extensions/) are designed to integrate with and extend functionality in the external CUTLASS repository. When analyzing these extensions, their consumers and functionality wiring may exist in the CUTLASS codebase rather than within TensorRT-LLM itself.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txtcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/kernels/CMakeLists.txttensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
📚 Learning: 2025-09-23T15:01:00.070Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:15-17
Timestamp: 2025-09-23T15:01:00.070Z
Learning: In TensorRT-LLM NCCL device kernels, the <sstream> header is not needed as an explicit include in config.cu because it's provided transitively through other headers. Local compilation testing confirms this works without the explicit include.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txtcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/thop/CMakeLists.txtcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/cuteDslKernels/CMakeLists.txtcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/CMakeLists.txtcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cu
📚 Learning: 2025-08-18T09:08:07.687Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 6984
File: cpp/tensorrt_llm/CMakeLists.txt:297-299
Timestamp: 2025-08-18T09:08:07.687Z
Learning: In the TensorRT-LLM project, artifacts are manually copied rather than installed via `cmake --install`, so INSTALL_RPATH properties are not needed - only BUILD_RPATH affects the final artifacts.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txt
📚 Learning: 2025-08-08T05:06:31.596Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp:36-36
Timestamp: 2025-08-08T05:06:31.596Z
Learning: CUTLASS extension files (under cpp/tensorrt_llm/cutlass_extensions/) follow CUTLASS coding style conventions, including using #pragma once instead of TRTLLM_ prefixed header guards, even though they are .hpp files.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txtcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/thop/CMakeLists.txtcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/kernels/cuteDslKernels/CMakeLists.txtcpp/tensorrt_llm/kernels/CMakeLists.txt
📚 Learning: 2025-09-09T09:40:45.658Z
Learnt from: fredricz-20070104
Repo: NVIDIA/TensorRT-LLM PR: 7645
File: tests/integration/test_lists/qa/llm_function_core.txt:648-648
Timestamp: 2025-09-09T09:40:45.658Z
Learning: In TensorRT-LLM test lists, it's common and intentional for the same test to appear in multiple test list files when they serve different purposes (e.g., llm_function_core.txt for comprehensive core functionality testing and llm_function_core_sanity.txt for quick sanity checks). This duplication allows tests to be run in different testing contexts.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txttests/integration/test_lists/test-db/l0_b200.ymltests/integration/test_lists/test-db/l0_dgx_b200.ymltensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
📚 Learning: 2025-09-23T15:01:00.070Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:15-17
Timestamp: 2025-09-23T15:01:00.070Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/config.cu), std::ostringstream is used but <sstream> doesn't need to be explicitly included because it's provided transitively through other headers like tensorrt_llm/common/cudaUtils.h or config.h. Local compilation testing confirms this works without the explicit include.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txtcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/thop/CMakeLists.txtcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/CMakeLists.txt
📚 Learning: 2025-09-16T09:30:09.716Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 7763
File: cpp/tensorrt_llm/CMakeLists.txt:297-301
Timestamp: 2025-09-16T09:30:09.716Z
Learning: In the TensorRT-LLM project, NCCL libraries are loaded earlier by PyTorch libraries or the bindings library, so the main shared library doesn't need NCCL paths in its RPATH - the libraries will already be available in the process address space when needed.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txt
📚 Learning: 2025-08-06T13:58:07.506Z
Learnt from: galagam
Repo: NVIDIA/TensorRT-LLM PR: 6487
File: tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_trtllm_bench.py:1-12
Timestamp: 2025-08-06T13:58:07.506Z
Learning: In TensorRT-LLM, test files (files under tests/ directories) do not require NVIDIA copyright headers, unlike production source code files. Test files typically start directly with imports, docstrings, or code.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txttensorrt_llm/_torch/models/modeling_deepseekv3.pytests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-09-19T21:28:13.751Z
Learnt from: jhaotingc
Repo: NVIDIA/TensorRT-LLM PR: 7856
File: cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp:159-166
Timestamp: 2025-09-19T21:28:13.751Z
Learning: In TensorRT-LLM blockScaleMoe routing (cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu), the DeepSeek routing method performs reinterpret_cast<float*>(routingLogits) at line 89, which could cause issues if routing_logits are BF16. However, Qwen3-FP8 models use RenormalizeNaive routing method and are not affected by this dtype casting issue.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutensorrt_llm/_torch/models/modeling_deepseekv3.pycpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/thop/moeUtilOp.cpp
📚 Learning: 2025-08-08T22:03:40.707Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/thop/moeUtilOp.cpp
📚 Learning: 2025-08-20T07:43:36.447Z
Learnt from: ChristinaZ
Repo: NVIDIA/TensorRT-LLM PR: 7068
File: cpp/tensorrt_llm/kernels/moeTopKFuncs.cuh:169-172
Timestamp: 2025-08-20T07:43:36.447Z
Learning: In TensorRT-LLM MOE kernels, when processing up to 128 experts across 32 threads, each thread handles at most 4 experts (N < 5 constraint), where N represents candidates per thread rather than total system capacity.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/thop/moeUtilOp.cpp
📚 Learning: 2025-09-23T14:58:05.372Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:42-49
Timestamp: 2025-09-23T14:58:05.372Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/), the token partitioning intentionally uses ceil-like distribution (same token_per_rank for all ranks) to ensure all ranks launch the same number of blocks. This is required for optimal NCCL device API barrier performance, even though it may launch extra blocks for non-existent tokens on later ranks. Runtime bounds checking in the kernel (blockID validation) handles the overshoot cases.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/thop/moeUtilOp.cpptensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
📚 Learning: 2025-08-14T21:04:50.248Z
Learnt from: thorjohnsen
Repo: NVIDIA/TensorRT-LLM PR: 6910
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0
Timestamp: 2025-08-14T21:04:50.248Z
Learning: In KV cache onboarding logic during prefill in cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, when calculating which blocks fall within the attention window, use getTokensPerBlock() to advance token indices rather than block->getUniqueTokens().size(), because the calculation needs to consider the post-prefill state where blocks will be filled to capacity, not their current token count.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cu
📚 Learning: 2025-10-17T13:21:31.724Z
Learnt from: ixlmar
Repo: NVIDIA/TensorRT-LLM PR: 8398
File: tensorrt_llm/_torch/pyexecutor/sampling_utils.py:237-272
Timestamp: 2025-10-17T13:21:31.724Z
Learning: The setup.py file in TensorRT-LLM explicitly requires Python 3.10+ via `python_requires=">=3.10, <4"`, making match/case statements and other Python 3.10+ features appropriate throughout the codebase.
Applied to files:
requirements.txt
📚 Learning: 2025-09-17T02:48:52.732Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 7781
File: tests/integration/test_lists/waives.txt:313-313
Timestamp: 2025-09-17T02:48:52.732Z
Learning: In TensorRT-LLM, `tests/integration/test_lists/waives.txt` is specifically for waiving/skipping tests, while other test list files like those in `test-db/` and `qa/` directories are for different test execution contexts (pre-merge, post-merge, QA tests). The same test appearing in both waives.txt and execution list files is intentional - the test is part of test suites but will be skipped due to the waiver.
Applied to files:
tests/integration/test_lists/test-db/l0_b200.ymltests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-07-28T17:06:08.621Z
Learnt from: moraxu
Repo: NVIDIA/TensorRT-LLM PR: 6303
File: tests/integration/test_lists/qa/examples_test_list.txt:494-494
Timestamp: 2025-07-28T17:06:08.621Z
Learning: In TensorRT-LLM testing, it's common to have both CLI flow tests (test_cli_flow.py) and PyTorch API tests (test_llm_api_pytorch.py) for the same model. These serve different purposes: CLI flow tests validate the traditional command-line workflow, while PyTorch API tests validate the newer LLM API backend. Both are legitimate and should coexist.
Applied to files:
tests/integration/test_lists/test-db/l0_b200.ymltests/integration/test_lists/test-db/l0_dgx_b200.ymltests/integration/defs/accuracy/test_llm_api_pytorch.py
📚 Learning: 2025-08-26T09:49:04.956Z
Learnt from: pengbowang-nv
Repo: NVIDIA/TensorRT-LLM PR: 7192
File: tests/integration/test_lists/test-db/l0_dgx_b200.yml:56-72
Timestamp: 2025-08-26T09:49:04.956Z
Learning: In TensorRT-LLM test configuration files, the test scheduling system handles wildcard matching with special rules that prevent duplicate test execution even when the same tests appear in multiple yaml files with overlapping GPU wildcards (e.g., "*b200*" and "*gb200*").
Applied to files:
tests/integration/test_lists/test-db/l0_b200.ymltests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-08-14T06:36:40.701Z
Learnt from: timlee0212
Repo: NVIDIA/TensorRT-LLM PR: 6886
File: tensorrt_llm/_torch/models/modeling_deepseekv3.py:0-0
Timestamp: 2025-08-14T06:36:40.701Z
Learning: In DeepSeek V3 model (tensorrt_llm/_torch/models/modeling_deepseekv3.py), the disagreement between AllReduce.__init__ guard and _compute_mlp_tp_size logic for MNNVL usage is expected by design. The AllReduce component and MLP TP-size computation intentionally use different criteria for MNNVL availability decisions.
Applied to files:
tests/integration/test_lists/test-db/l0_b200.ymltensorrt_llm/_torch/models/modeling_deepseekv3.pycpp/tensorrt_llm/thop/moeUtilOp.cpp
📚 Learning: 2025-08-21T02:39:12.009Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1475-1480
Timestamp: 2025-08-21T02:39:12.009Z
Learning: The min latency mode functionality in TensorRT-LLM MOE kernels (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu) is deprecated and no longer being maintained/updated, as confirmed by djns99. Bug reports and optimization suggestions for the computeStridesTmaWarpSpecializedLowLatencyKernel and related min latency code paths should be deprioritized.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/thop/moeUtilOp.cpptensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
📚 Learning: 2025-09-23T15:13:48.819Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/multimem.h:20-30
Timestamp: 2025-09-23T15:13:48.819Z
Learning: TRT-LLM targets modern CUDA toolkits that support FP8 datatypes, so cuda_fp8.h can be included unconditionally without version guards in TRT-LLM code.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/thop/fp4Quantize.cpp
📚 Learning: 2025-08-22T01:54:35.850Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h:999-1000
Timestamp: 2025-08-22T01:54:35.850Z
Learning: The `internal_cutlass_kernels` directory in TensorRT-LLM is a mirror of an internal NVIDIA repository and maintains its own implementation and API that may diverge from the public `cutlass_kernels` version. API inconsistencies between these two directories are intentional and by design, not bugs to be fixed.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/CMakeLists.txttensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
📚 Learning: 2025-08-21T02:41:10.565Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_gemm_kernels.h:141-145
Timestamp: 2025-08-21T02:41:10.565Z
Learning: In TensorRT-LLM MOE GEMM kernels (cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_gemm_kernels.h), the stride_act and stride_weight pointers in TmaWarpSpecializedGroupedGemmInput are intentionally declared as void* rather than typed pointers because the actual stride type is determined at runtime based on factors like the swap_ab flag and layout decisions. This runtime type determination makes compile-time type safety impossible, so void* is the correct approach.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu
📚 Learning: 2025-08-08T05:10:38.906Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp:0-0
Timestamp: 2025-08-08T05:10:38.906Z
Learning: The ScaledAccPerRowBiasPerColScaleScatter fusion in CUTLASS extensions (cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp) is specifically designed for per-column scaling factors only, so it uses a fixed Stride<_0,_1,int64_t> rather than conditional stride logic.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu
📚 Learning: 2025-08-15T06:46:54.897Z
Learnt from: eopXD
Repo: NVIDIA/TensorRT-LLM PR: 6767
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0
Timestamp: 2025-08-15T06:46:54.897Z
Learning: In cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp addToken function, newly allocated blocks are unshared by design. The beam search path in addToken (when sequence.getNumTokens() > windowSize) is currently broken/non-functional with SWA, so the block allocation doesn't follow a shared-then-unshared pattern.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cu
📚 Learning: 2025-08-09T20:57:04.084Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_tma_warp_specialized_input.cu:118-127
Timestamp: 2025-08-09T20:57:04.084Z
Learning: In the CUTLASS MoE finalize fusion implementation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_tma_warp_specialized_input.cu), when setting `fused_finalize_epilogue.stride_final_output` with shape `(hidden_size, num_output_tokens, 1)`, the `num_rows_in_final_output` should be set to `num_output_tokens` (not `hidden_size`) because of a swap+transpose operation that maps rows of the output tensor to `hidden_size` and columns to `num_output_tokens`.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/thop/moeUtilOp.cpptensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
📚 Learning: 2025-08-19T03:35:20.866Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4616-4626
Timestamp: 2025-08-19T03:35:20.866Z
Learning: In the MOE profiler TMA workspace preparation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu), the overlapping of TMA WS regions for NONE and FINALIZE variants is deliberate design to save memory space, as confirmed by djns99. The comment "reuse the same pointers to save space" reflects this intentional behavior.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.htensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/thop/moeUtilOp.cpp
📚 Learning: 2025-08-19T12:45:11.997Z
Learnt from: amitz-nv
Repo: NVIDIA/TensorRT-LLM PR: 7033
File: tensorrt_llm/_torch/pyexecutor/model_engine.py:0-0
Timestamp: 2025-08-19T12:45:11.997Z
Learning: In tensorrt_llm/_torch/pyexecutor/model_engine.py, DoRA (Delta Orthogonal Rank Adaptation) functionality was removed from the PyTorch flow to eliminate issues with inverted DoRA detection logic. The original is_dora condition was checking if scaling_vec_pointer == 0, which was potentially incorrect.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutensorrt_llm/_torch/models/modeling_deepseekv3.pycpp/tensorrt_llm/thop/moeUtilOp.cpp
📚 Learning: 2025-08-14T23:23:27.449Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4010-4012
Timestamp: 2025-08-14T23:23:27.449Z
Learning: For MOE (Mixture of Experts) code reviews in TensorRT-LLM, avoid repeatedly suggesting finalize fusion validation checks and safety assertions. The user djns99 has indicated these suggestions are repetitive and unwanted across multiple MOE-related changes.
Applied to files:
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cutests/unittest/_torch/thop/parallel/test_cute_dsl_moe.pycpp/tensorrt_llm/thop/moeUtilOp.cpptensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pytensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
📚 Learning: 2025-08-08T22:03:28.403Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/internal_cutlass_kernels/include/moe_gemm_kernels.h:152-154
Timestamp: 2025-08-08T22:03:28.403Z
Learning: In CUTLASS, `TagToStrideC_t` template is defined for both pointer types (e.g., `Layout*`) and non-pointer types (e.g., `Layout`). When used with pointer types, it's often wrapped with `std::remove_pointer_t`, while non-pointer usage is direct. Both `cutlass::detail::TagToStrideC_t` and `cutlass::gemm::TagToStrideC_t` support both forms.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu
📚 Learning: 2025-08-08T04:10:19.038Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6728
File: cpp/tensorrt_llm/plugins/mixtureOfExperts/mixtureOfExpertsPlugin.cpp:966-966
Timestamp: 2025-08-08T04:10:19.038Z
Learning: TensorRT plugins currently don't support padding functionality, and TensorRT is not getting new features (in maintenance mode). This means that duplicating parameters like mExpertHiddenSize in function calls, even with TODO comments, can be acceptable as pragmatic solutions within these constraints.
Applied to files:
cpp/tensorrt_llm/thop/moeUtilOp.cpp
📚 Learning: 2025-10-20T17:07:18.745Z
Learnt from: nvchenghaoz
Repo: NVIDIA/TensorRT-LLM PR: 8469
File: tensorrt_llm/_torch/auto_deploy/models/patches/nemotron_h.py:98-116
Timestamp: 2025-10-20T17:07:18.745Z
Learning: In NemotronH models (tensorrt_llm/_torch/auto_deploy/models/patches/nemotron_h.py), the gate (self.gate) returns topk_indices and topk_weights that are already in the correct shape to be passed directly to torch_ops.auto_deploy.torch_moe without needing to reshape them when hidden_states is flattened.
Applied to files:
tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py
📚 Learning: 2025-08-14T15:38:01.771Z
Learnt from: MatthiasKohl
Repo: NVIDIA/TensorRT-LLM PR: 6904
File: cpp/tensorrt_llm/pybind/thop/bindings.cpp:55-57
Timestamp: 2025-08-14T15:38:01.771Z
Learning: In TensorRT-LLM Python bindings, tensor parameter collections like mla_tensor_params and spec_decoding_tensor_params are kept as required parameters without defaults to maintain API consistency, even when it might affect backward compatibility.
Applied to files:
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
🧬 Code graph analysis (9)
tensorrt_llm/_torch/autotuner.py (1)
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py (1)
gen_tuning_buckets(369-373)
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.h (2)
cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h (1)
tensorrt_llm(39-147)cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cu (9)
void(58-113)void(182-235)void(280-356)moePermute(116-160)moePermute(116-119)moeUnpermute(238-263)moeUnpermute(238-240)moeActivation(359-417)moeActivation(359-362)
cpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp (1)
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.h (7)
top_k(240-240)n_group(241-241)topk_group(243-243)local_expert_offset(246-246)local_num_experts(247-247)getMaxPermutedPaddedCount(105-110)getMaxNumCtasInBatchDim(75-103)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.py (1)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/custom_pipeline.py (5)
PipelineTmaUmma(73-269)PipelineUmmaAsync(273-376)producer_acquire(231-255)producer_tail(364-376)consumer_release(217-229)
tests/integration/defs/accuracy/test_llm_api_pytorch.py (1)
tests/integration/defs/conftest.py (2)
parametrize_with_ids(1818-1844)get_sm_version(1890-1893)
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cu (2)
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu (16)
void(156-275)void(309-398)void(564-613)void(660-707)void(710-740)void(799-826)void(1022-1067)void(1070-1082)void(1102-1141)void(1143-1195)void(1198-1236)void(1240-1335)void(1361-1566)void(1683-1757)void(1762-1865)void(1943-1995)cpp/include/tensorrt_llm/common/cudaUtils.h (1)
getMultiProcessorCount(403-450)
tests/unittest/_torch/thop/parallel/test_cute_dsl_moe.py (4)
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py (10)
GroupedGemmInputsHelper(341-415)get_max_num_permuted_tokens(359-360)infer_num_tokens(362-367)gen_tuning_buckets(369-373)map_to_tuning_buckets(375-377)get_max_num_tiles(351-357)_(325-339)_(665-683)_(879-899)cute_dsl_nvfp4_grouped_gemm_blackwell(628-661)tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py (1)
cute_dsl_nvfp4_grouped_gemm_ref(93-149)tensorrt_llm/_torch/utils.py (1)
unswizzle_sf(144-159)cpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp (10)
moe_sort(112-125)moe_sort(112-114)moe_permute(129-200)moe_permute(129-132)moe_unpermute(204-254)moe_unpermute(204-205)moe_swiglu(257-303)moe_swiglu(257-258)moe_swiglu_nvfp4_quantize(305-359)moe_swiglu_nvfp4_quantize(305-307)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py (3)
tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py (1)
allgather(97-102)tensorrt_llm/_torch/utils.py (2)
Fp4QuantizedTensor(110-117)shape(116-117)tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py (1)
cute_dsl_nvfp4_grouped_gemm_blackwell(628-661)
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py (5)
tensorrt_llm/_torch/autotuner.py (6)
AutoTuner(514-1181)TuningConfig(53-101)get_valid_tactics(156-174)forward(180-206)get(545-548)choose_one(623-778)tensorrt_llm/_torch/utils.py (3)
fp4_scale_infer_shape(262-267)get_last_power_of_2_num_tokens_buckets(252-259)last_positive_power_of_2(229-234)tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py (3)
Sm100BlockScaledPersistentDenseGemmKernel(65-1877)Sm100BlockScaledPersistentDenseGemmKernelWrapper(1901-2015)can_implement(1821-1877)tensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.py (3)
Sm100BlockScaledPersistentGroupedGemmKernel(56-2285)can_implement(2142-2225)wrapper(2228-2285)tensorrt_llm/_torch/cute_dsl_kernels/blackwell/utils.py (2)
make_ptr(142-188)dtype(118-119)
🪛 Clang (14.0.6)
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.h
[error] 18-18: 'tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h' file not found
(clang-diagnostic-error)
cpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp
[error] 17-17: 'tensorrt_llm/kernels/cuteDslKernels/moeUtils.h' file not found
(clang-diagnostic-error)
🪛 Ruff (0.14.4)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.py
389-389: Avoid specifying long messages outside the exception class
(TRY003)
695-695: Unpacked variable bidy is never used
Prefix it with an underscore or any other dummy variable pattern
(RUF059)
695-695: Unpacked variable bidz is never used
Prefix it with an underscore or any other dummy variable pattern
(RUF059)
1060-1060: Loop control variable k_tile not used within loop body
Rename unused k_tile to _k_tile
(B007)
1282-1282: Loop control variable k_tile not used within loop body
Rename unused k_tile to _k_tile
(B007)
1701-1701: Unused method argument: tidx
(ARG002)
1928-1928: Avoid specifying long messages outside the exception class
(TRY003)
tests/unittest/_torch/thop/parallel/test_cute_dsl_moe.py
306-306: Loop control variable i not used within loop body
Rename unused i to _i
(B007)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py
117-117: Ambiguous variable name: l
(E741)
136-136: Consider [0, *num_tiles_per_expert.cumsum(dim=0).tolist()] instead of concatenation
Replace with [0, *num_tiles_per_expert.cumsum(dim=0).tolist()]
(RUF005)
139-139: zip() without an explicit strict= parameter
Add explicit value for parameter strict=
(B905)
139-139: Prefer itertools.pairwise() over zip() when iterating over successive pairs
Replace zip() with itertools.pairwise()
(RUF007)
223-223: Unused method argument: output_dtype
(ARG002)
224-224: Unused method argument: all_rank_num_tokens
(ARG002)
225-225: Unused method argument: use_dp_padding
(ARG002)
369-369: Unpacked variable total_num_padded_tokens is never used
Prefix it with an underscore or any other dummy variable pattern
(RUF059)
456-458: Avoid specifying long messages outside the exception class
(TRY003)
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
418-418: Mutable class attributes should be annotated with typing.ClassVar
(RUF012)
419-419: Mutable class attributes should be annotated with typing.ClassVar
(RUF012)
441-443: Avoid specifying long messages outside the exception class
(TRY003)
448-448: Unused method argument: profile
(ARG002)
449-449: Unused method argument: kwargs
(ARG002)
453-453: Ambiguous variable name: l
(E741)
519-519: Ambiguous variable name: l
(E741)
668-668: Unused function argument: input_scale
(ARG001)
669-669: Unused function argument: weight_scale
(ARG001)
670-670: Unused function argument: alpha
(ARG001)
671-671: Unused function argument: tile_idx_to_group_idx
(ARG001)
672-672: Unused function argument: num_non_exiting_tiles
(ARG001)
673-673: Unused function argument: num_experts
(ARG001)
674-674: Unused function argument: top_k
(ARG001)
675-675: Unused function argument: num_local_experts
(ARG001)
676-676: Unused function argument: local_expert_offset
(ARG001)
677-677: Unused function argument: tile_size
(ARG001)
679-679: Unused function argument: scaling_vector_size
(ARG001)
717-717: Mutable class attributes should be annotated with typing.ClassVar
(RUF012)
738-738: Unused method argument: inputs
(ARG002)
739-739: Unused method argument: profile
(ARG002)
740-740: Unused method argument: kwargs
(ARG002)
772-772: Unpacked variable total_num_padded_tokens is never used
Prefix it with an underscore or any other dummy variable pattern
(RUF059)
881-881: Unused function argument: input_scale
(ARG001)
882-882: Unused function argument: token_selected_experts
(ARG001)
883-883: Unused function argument: token_final_scales
(ARG001)
884-884: Unused function argument: gemm1_weight
(ARG001)
885-885: Unused function argument: gemm1_weight_scale
(ARG001)
886-886: Unused function argument: gemm1_alpha
(ARG001)
887-887: Unused function argument: gemm2_input_global_scale
(ARG001)
888-888: Unused function argument: gemm2_weight
(ARG001)
889-889: Unused function argument: gemm2_weight_scale
(ARG001)
890-890: Unused function argument: gemm2_alpha
(ARG001)
891-891: Unused function argument: num_experts
(ARG001)
892-892: Unused function argument: top_k
(ARG001)
893-893: Unused function argument: num_local_experts
(ARG001)
894-894: Unused function argument: local_expert_offset
(ARG001)
896-896: Unused function argument: scaling_vector_size
(ARG001)
📝 WalkthroughWalkthroughThis PR introduces NVFP4 (4-bit floating point) support with grouped GEMM optimizations for Mixture-of-Experts routing in TensorRT-LLM, targeting Blackwell architecture. It includes new CUDA kernels for MOE permutation/unpermutation/activation, refactored adaptor structures, updated routing kernels with expanded-to-permuted index mappings, new PyTorch custom ops, Cute DSL Python kernel implementations, and comprehensive test coverage. Changes
Sequence Diagram(s)sequenceDiagram
actor User as PyTorch User
participant MOEFused as CuteDslFusedMoE
participant Router as Router (Top-K)
participant Custom as Custom Ops
participant Kernel as CUDA Kernels
User->>MOEFused: forward(input)
MOEFused->>Router: moe_topk_sort/moe_sort
Router->>Kernel: Run routing kernel
Kernel-->>Router: Returns expert assignments & scales
alt NVFP4 Path
MOEFused->>Custom: moe_permute(input)
Custom->>Kernel: Execute permutation kernel
Kernel-->>Custom: permuted_output, permuted_sf
MOEFused->>Custom: cute_dsl_nvfp4_grouped_gemm_blackwell
Custom->>Kernel: Execute grouped GEMM (persistent)
Kernel-->>Custom: gemm_output
MOEFused->>Custom: moe_swiglu_nvfp4_quantize(gemm_output)
Custom->>Kernel: Execute activation + FP4 quantize
Kernel-->>Custom: activated_output, output_sf
MOEFused->>Custom: moe_unpermute(activated_output)
Custom->>Kernel: Execute unpermutation kernel
Kernel-->>Custom: final_output
end
MOEFused-->>User: return final_output
Estimated code review effort🎯 4 (Complex) | ⏱️ ~60 minutes Areas requiring extra attention:
Possibly related PRs
Pre-merge checks and finishing touches❌ Failed checks (1 warning)
✅ Passed checks (2 passed)
✨ Finishing touches
🧪 Generate unit tests (beta)
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Actionable comments posted: 4
Caution
Some comments are outside the diff and can’t be posted inline due to platform limitations.
⚠️ Outside diff range comments (2)
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu (2)
204-224: Fix smart_routing local/global expert indexing and ID storage.Two issues in buildMinLatencyActiveExpertMapsKernel():
- active_expert_global_ids stores local IDs; it must store global IDs.
- s_local_experts is indexed with a global expert ID in step 6; must subtract start_expert first to avoid OOB/incorrect masking.
Apply:
@@ - active_expert_global_ids[offset - num_active_offset_start] = i; + active_expert_global_ids[offset - num_active_offset_start] = i + start_expert; @@ - bool is_valid_expert - = smart_routing ? s_local_experts[expert] : (expert >= start_expert && expert < end_expert); + int local_expert = expert - start_expert; + bool is_valid_expert = smart_routing + ? (expert >= start_expert && expert < end_expert && s_local_experts[local_expert]) + : (expert >= start_expert && expert < end_expert);These fixes prevent incorrect masking and wrong expert IDs in min‑latency mode.
Also applies to: 242-253
2097-2112: Avoid UB: guard pointer arithmetic on a possibly null bias_ptr.bias_ptr may be null, but bias_ptr + bias_offset is computed unconditionally. Compute the vector pointer only when bias_ptr is non‑null.
- auto bias_ptr_vec = reinterpret_cast<BiasElem const*>(bias_ptr + bias_offset); + auto bias_ptr_vec = bias_ptr ? reinterpret_cast<BiasElem const*>(bias_ptr + bias_offset) : nullptr;Downstream code already checks bias_ptr/bias_ptr_vec before use.
🧹 Nitpick comments (6)
cpp/tensorrt_llm/thop/fp4Quantize.cpp (3)
1-2: Update copyright year to include 2025.The copyright header should reflect the current year (2025) as per coding guidelines.
Apply this diff to update the copyright year:
-/* - * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved. +/* + * Copyright (c) 2020-2025, NVIDIA CORPORATION. All rights reserved.
86-86: Consider renaming thread_local variable to follow static variable naming convention.The
mMultiProcessorCountvariable uses the 'm' prefix, which is reserved for member variables. Function-scopethread_localvariables should follow the same naming convention as static variables and use the 's' prefix.Apply this diff:
- const thread_local int mMultiProcessorCount = tensorrt_llm::common::getMultiProcessorCount(); + const thread_local int sMultiProcessorCount = tensorrt_llm::common::getMultiProcessorCount();And update the reference on line 94:
reinterpret_cast<int32_t*>(scaleFP8SF.data_ptr()), sfUseUE8M0, layout, mMultiProcessorCount, \ + reinterpret_cast<int32_t*>(scaleFP8SF.data_ptr()), sfUseUE8M0, layout, sMultiProcessorCount, \
192-192: Consider adding 's' prefix to static variable.The
multiProcessorCountstatic variable should use the 's' prefix per coding guidelines for locally visible static variables.Apply this diff:
- static int multiProcessorCount = tensorrt_llm::common::getMultiProcessorCount(); + static int sMultiProcessorCount = tensorrt_llm::common::getMultiProcessorCount();And update the references on lines 211 and 220:
tensorrt_llm::kernels::computePerTokenGlobalScaleForFP4Quantization<half>(batch_size, token_num, hidden_size, reinterpret_cast<half const*>(input.data_ptr()), tokensPerBatchPtr, globalScale.data_ptr<float>(), - multiProcessorCount, at::cuda::getCurrentCUDAStream(input.get_device())); + sMultiProcessorCount, at::cuda::getCurrentCUDAStream(input.get_device()));tensorrt_llm::kernels::computePerTokenGlobalScaleForFP4Quantization<__nv_bfloat16>(batch_size, token_num, hidden_size, reinterpret_cast<__nv_bfloat16 const*>(input.data_ptr()), tokensPerBatchPtr, - globalScale.data_ptr<float>(), multiProcessorCount, at::cuda::getCurrentCUDAStream(input.get_device())); + globalScale.data_ptr<float>(), sMultiProcessorCount, at::cuda::getCurrentCUDAStream(input.get_device()));tensorrt_llm/_torch/autotuner.py (1)
1058-1062: Clarify randint range intent for float4_e2m1fn_x2 dtype conversionThe special handling for
torch.float4_e2m1fn_x2usestorch.randint(-5, 5)before converting touint8and viewing as the dtype. The negative values from this range will wrap when cast to uint8 (e.g., -1→255, -5→251), creating indirect bit patterns through integer overflow. While this approach avoids all-zero tensors (as intended per the comment at line 1057), the wrapping behavior is implicit and not immediately clear.For better clarity and directness, consider using
torch.randint(0, 256)to generate explicit uint8 bit patterns without relying on wrapping. This maintains the goal of avoiding all-zero tensors while making the intent more obvious:if dtype == torch.float4_e2m1fn_x2: return torch.randint(-5, 5, shapes, - device=device).to(torch.uint8).view(dtype) + device=device).to(torch.uint8).view(dtype) + # Generate explicit uint8 bit patterns for float4 (2 FP4 values per byte) + return torch.randint(0, 256, shapes, + device=device, dtype=torch.uint8).view(dtype)Or if the negative wrapping is preferred for some reason, add an explanatory comment clarifying why.
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu (1)
1346-1347: Nit: comment grammar.“Duplicated and permutes rows for MoE.” → “Duplicates and permutes rows for MoE.”
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cu (1)
352-355: Consider using expandedIdx for consistency (optional refactor).The write to
mPtrPermutedIdxToExpandedIdx[permutedIdx] = tokenIdx;is semantically correct sinceexpandedIdx == tokenIdxwhentopK == 1(Line 28:MaxNumTopExperts = 1). However, for consistency with other routing variants (RoutingDeepSeek.cu line 532, RoutingKernel.cuh lines 479, 849), consider definingexpandedIdx = tokenIdx;and using it in the write.Apply this diff for consistency:
+ auto expandedIdx = tokenIdx; // Since topK=1 in Llama4 // write out `mPtrPermutedIdxToExpandedIdx` if required if (params.mPtrPermutedIdxToExpandedIdx != nullptr && isLocalExpert) { - params.mPtrPermutedIdxToExpandedIdx[permutedIdx] = tokenIdx; + params.mPtrPermutedIdxToExpandedIdx[permutedIdx] = expandedIdx; }
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📒 Files selected for processing (30)
cpp/tensorrt_llm/CMakeLists.txt(1 hunks)cpp/tensorrt_llm/kernels/CMakeLists.txt(2 hunks)cpp/tensorrt_llm/kernels/cuteDslKernels/CMakeLists.txt(1 hunks)cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cu(1 hunks)cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.h(1 hunks)cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h(2 hunks)cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu(1 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cu(2 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuh(2 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.h(3 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cu(1 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cu(1 hunks)cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu(3 hunks)cpp/tensorrt_llm/thop/CMakeLists.txt(1 hunks)cpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp(1 hunks)cpp/tensorrt_llm/thop/fp4Quantize.cpp(1 hunks)cpp/tensorrt_llm/thop/moeUtilOp.cpp(1 hunks)requirements.txt(1 hunks)tensorrt_llm/_torch/autotuner.py(2 hunks)tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py(4 hunks)tensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.py(1 hunks)tensorrt_llm/_torch/models/modeling_deepseekv3.py(1 hunks)tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py(7 hunks)tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py(0 hunks)tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py(0 hunks)tensorrt_llm/_torch/modules/fused_moe/fused_moe_wide_ep.py(0 hunks)tests/integration/defs/accuracy/test_llm_api_pytorch.py(3 hunks)tests/integration/test_lists/test-db/l0_b200.yml(2 hunks)tests/integration/test_lists/test-db/l0_dgx_b200.yml(2 hunks)tests/unittest/_torch/thop/parallel/test_cute_dsl_moe.py(1 hunks)
💤 Files with no reviewable changes (3)
- tensorrt_llm/_torch/modules/fused_moe/fused_moe_deepgemm.py
- tensorrt_llm/_torch/modules/fused_moe/fused_moe_wide_ep.py
- tensorrt_llm/_torch/modules/fused_moe/fused_moe_cutlass.py
🧰 Additional context used
📓 Path-based instructions (8)
**/*.{h,hpp,hh,hxx,cpp,cxx,cc,cu,cuh}
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Use smart pointers for heap allocations; prefer unique_ptr for sole ownership, shared_ptr for shared...
Files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/thop/fp4Quantize.cpp
**/*.{cpp,cxx,cc,cu,h,hpp,hh,hxx,cuh}
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C++ filenames should be lowerCamelCase (first letter lowercase) and must be case-insensitive unique within a compilation target.
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cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/thop/fp4Quantize.cpp
**/*.{h,hpp,hh,hxx,cpp,cxx,cc,cu,cuh,py}
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Use only spaces, no tabs; indent with 4 spaces.
Files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cutensorrt_llm/_torch/models/modeling_deepseekv3.pycpp/tensorrt_llm/thop/moeUtilOp.cpptensorrt_llm/_torch/autotuner.pycpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhtensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pytests/integration/defs/accuracy/test_llm_api_pytorch.pytensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.pycpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.htests/unittest/_torch/thop/parallel/test_cute_dsl_moe.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/thop/fp4Quantize.cpp
**/*.{cpp,cxx,cc,h,hpp,hh,hxx,cu,cuh,py}
📄 CodeRabbit inference engine (CODING_GUIDELINES.md)
Prepend the NVIDIA Apache-2.0 copyright header with current year to the top of all source files (e.g., .cpp, .h, .cu, .py).
Files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cutensorrt_llm/_torch/models/modeling_deepseekv3.pycpp/tensorrt_llm/thop/moeUtilOp.cpptensorrt_llm/_torch/autotuner.pycpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhtensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pytests/integration/defs/accuracy/test_llm_api_pytorch.pytensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.pycpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.htests/unittest/_torch/thop/parallel/test_cute_dsl_moe.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/thop/fp4Quantize.cpp
**/*.py
📄 CodeRabbit inference engine (CODING_GUIDELINES.md)
**/*.py: Python code must target Python 3.8+.
Indent Python code with 4 spaces; do not use tabs.
Maintain module namespace when importing; prefer 'from package.subpackage import foo' then 'foo.SomeClass()' instead of importing the class directly.
Python filenames should be snake_case (e.g., some_file.py).
Python classes use PascalCase names.
Functions and methods use snake_case names.
Local variables use snake_case; prefix 'k' for variables that start with a number (e.g., k_99th_percentile).
Global variables use upper SNAKE_CASE prefixed with 'G' (e.g., G_MY_GLOBAL).
Constants use upper SNAKE_CASE (e.g., MY_CONSTANT).
Avoid shadowing variables from an outer scope.
Initialize all externally visible members of a class in the constructor.
Prefer docstrings for interfaces that may be used outside a file; comments for in-function or file-local interfaces.
Use Google-style docstrings for classes and functions (Sphinx-parsable).
Document attributes and variables inline so they render under the class/function docstring.
Avoid reflection when a simpler, explicit approach suffices (e.g., avoid dict(**locals()) patterns).
In try/except, catch the most specific exceptions possible.
For duck-typing try/except, keep the try body minimal and use else for the main logic.
Files:
tensorrt_llm/_torch/models/modeling_deepseekv3.pytensorrt_llm/_torch/autotuner.pytensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.pytensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pytests/integration/defs/accuracy/test_llm_api_pytorch.pytensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.pytests/unittest/_torch/thop/parallel/test_cute_dsl_moe.py
**/*.{h,hpp,hh,hxx,cpp,cxx,cc}
📄 CodeRabbit inference engine (CODING_GUIDELINES.md)
**/*.{h,hpp,hh,hxx,cpp,cxx,cc}: Prefer anonymous namespaces over 'static' for internal linkage of functions.
All templates (class/function/member/static) must be instantiated at least once; non-POD classes should have private data members.
Files:
cpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cppcpp/tensorrt_llm/thop/fp4Quantize.cpp
**/*.{h,hpp,hh,hxx}
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Document new class interfaces and function prototypes with Doxygen; use //! for single-line and //!< for members.
Files:
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h
**/*.{h,hpp,hh,hxx,cuh}
📄 CodeRabbit inference engine (CODING_GUIDELINES.md)
Use include guards named 'TRTLLM_<FILE_NAME_IN_CAPS_WITH_UNDERSCORES>_H' (no leading or trailing underscore; directory names excluded).
Files:
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h
🧠 Learnings (35)
📓 Common learnings
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4010-4012
Timestamp: 2025-08-14T23:23:27.449Z
Learning: For MOE (Mixture of Experts) code reviews in TensorRT-LLM, avoid repeatedly suggesting finalize fusion validation checks and safety assertions. The user djns99 has indicated these suggestions are repetitive and unwanted across multiple MOE-related changes.
Learnt from: jhaotingc
Repo: NVIDIA/TensorRT-LLM PR: 7856
File: cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp:159-166
Timestamp: 2025-09-19T21:28:13.751Z
Learning: In TensorRT-LLM blockScaleMoe routing (cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu), the DeepSeek routing method performs reinterpret_cast<float*>(routingLogits) at line 89, which could cause issues if routing_logits are BF16. However, Qwen3-FP8 models use RenormalizeNaive routing method and are not affected by this dtype casting issue.
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/multimem.h:20-30
Timestamp: 2025-09-23T15:13:48.819Z
Learning: TRT-LLM targets modern CUDA toolkits that support FP8 datatypes, so cuda_fp8.h can be included unconditionally without version guards in TRT-LLM code.
Learnt from: ChristinaZ
Repo: NVIDIA/TensorRT-LLM PR: 7068
File: cpp/tensorrt_llm/kernels/moeTopKFuncs.cuh:169-172
Timestamp: 2025-08-20T07:43:36.447Z
Learning: In TensorRT-LLM MOE kernels, when processing up to 128 experts across 32 threads, each thread handles at most 4 experts (N < 5 constraint), where N represents candidates per thread rather than total system capacity.
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.
📚 Learning: 2025-10-17T13:21:31.724Z
Learnt from: ixlmar
Repo: NVIDIA/TensorRT-LLM PR: 8398
File: tensorrt_llm/_torch/pyexecutor/sampling_utils.py:237-272
Timestamp: 2025-10-17T13:21:31.724Z
Learning: The setup.py file in TensorRT-LLM explicitly requires Python 3.10+ via `python_requires=">=3.10, <4"`, making match/case statements and other Python 3.10+ features appropriate throughout the codebase.
Applied to files:
requirements.txt
📚 Learning: 2025-09-19T21:28:13.751Z
Learnt from: jhaotingc
Repo: NVIDIA/TensorRT-LLM PR: 7856
File: cpp/tensorrt_llm/thop/fp8BlockScaleMoe.cpp:159-166
Timestamp: 2025-09-19T21:28:13.751Z
Learning: In TensorRT-LLM blockScaleMoe routing (cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu), the DeepSeek routing method performs reinterpret_cast<float*>(routingLogits) at line 89, which could cause issues if routing_logits are BF16. However, Qwen3-FP8 models use RenormalizeNaive routing method and are not affected by this dtype casting issue.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cutensorrt_llm/_torch/models/modeling_deepseekv3.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp
📚 Learning: 2025-08-08T22:03:40.707Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1198-1209
Timestamp: 2025-08-08T22:03:40.707Z
Learning: In the CUTLASS MoE kernels (cpp/tensorrt_llm/cutlass_extensions), when `layout_info.fusion` is set to `TmaWarpSpecializedGroupedGemmInput::EpilogueFusion::FINALIZE`, the `router_scales` parameter must be non-null by design. The fused finalize kernel epilogue does not perform nullptr checks and requires valid router scales to function correctly. This is an implicit contract that callers must satisfy when enabling the FINALIZE fusion mode.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cu
📚 Learning: 2025-09-23T14:58:05.372Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:42-49
Timestamp: 2025-09-23T14:58:05.372Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/), the token partitioning intentionally uses ceil-like distribution (same token_per_rank for all ranks) to ensure all ranks launch the same number of blocks. This is required for optimal NCCL device API barrier performance, even though it may launch extra blocks for non-existent tokens on later ranks. Runtime bounds checking in the kernel (blockID validation) handles the overshoot cases.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.pycpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cu
📚 Learning: 2025-08-14T21:04:50.248Z
Learnt from: thorjohnsen
Repo: NVIDIA/TensorRT-LLM PR: 6910
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0
Timestamp: 2025-08-14T21:04:50.248Z
Learning: In KV cache onboarding logic during prefill in cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, when calculating which blocks fall within the attention window, use getTokensPerBlock() to advance token indices rather than block->getUniqueTokens().size(), because the calculation needs to consider the post-prefill state where blocks will be filled to capacity, not their current token count.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cu
📚 Learning: 2025-08-15T06:46:54.897Z
Learnt from: eopXD
Repo: NVIDIA/TensorRT-LLM PR: 6767
File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0
Timestamp: 2025-08-15T06:46:54.897Z
Learning: In cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp addToken function, newly allocated blocks are unshared by design. The beam search path in addToken (when sequence.getNumTokens() > windowSize) is currently broken/non-functional with SWA, so the block allocation doesn't follow a shared-then-unshared pattern.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cu
📚 Learning: 2025-08-20T07:43:36.447Z
Learnt from: ChristinaZ
Repo: NVIDIA/TensorRT-LLM PR: 7068
File: cpp/tensorrt_llm/kernels/moeTopKFuncs.cuh:169-172
Timestamp: 2025-08-20T07:43:36.447Z
Learning: In TensorRT-LLM MOE kernels, when processing up to 128 experts across 32 threads, each thread handles at most 4 experts (N < 5 constraint), where N represents candidates per thread rather than total system capacity.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp
📚 Learning: 2025-08-09T20:57:04.084Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_tma_warp_specialized_input.cu:118-127
Timestamp: 2025-08-09T20:57:04.084Z
Learning: In the CUTLASS MoE finalize fusion implementation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_gemm_tma_warp_specialized_input.cu), when setting `fused_finalize_epilogue.stride_final_output` with shape `(hidden_size, num_output_tokens, 1)`, the `num_rows_in_final_output` should be set to `num_output_tokens` (not `hidden_size`) because of a swap+transpose operation that maps rows of the output tensor to `hidden_size` and columns to `num_output_tokens`.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pytests/integration/defs/accuracy/test_llm_api_pytorch.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cu
📚 Learning: 2025-08-21T02:39:12.009Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:1475-1480
Timestamp: 2025-08-21T02:39:12.009Z
Learning: The min latency mode functionality in TensorRT-LLM MOE kernels (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu) is deprecated and no longer being maintained/updated, as confirmed by djns99. Bug reports and optimization suggestions for the computeStridesTmaWarpSpecializedLowLatencyKernel and related min latency code paths should be deprioritized.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cutests/integration/defs/accuracy/test_llm_api_pytorch.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingDeepSeek.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp
📚 Learning: 2025-09-23T15:01:00.070Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:15-17
Timestamp: 2025-09-23T15:01:00.070Z
Learning: In TensorRT-LLM NCCL device kernels, the <sstream> header is not needed as an explicit include in config.cu because it's provided transitively through other headers. Local compilation testing confirms this works without the explicit include.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/CMakeLists.txtcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/CMakeLists.txtcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingKernel.cuhcpp/tensorrt_llm/kernels/cuteDslKernels/CMakeLists.txtcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h
📚 Learning: 2025-08-19T03:35:20.866Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4616-4626
Timestamp: 2025-08-19T03:35:20.866Z
Learning: In the MOE profiler TMA workspace preparation (cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu), the overlapping of TMA WS regions for NONE and FINALIZE variants is deliberate design to save memory space, as confirmed by djns99. The comment "reuse the same pointers to save space" reflects this intentional behavior.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingLlama4.cucpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.htensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cu
📚 Learning: 2025-08-21T21:48:35.135Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp:399-417
Timestamp: 2025-08-21T21:48:35.135Z
Learning: CUTLASS extensions in TensorRT-LLM (located under cpp/tensorrt_llm/cutlass_extensions/) are designed to integrate with and extend functionality in the external CUTLASS repository. When analyzing these extensions, their consumers and functionality wiring may exist in the CUTLASS codebase rather than within TensorRT-LLM itself.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txtcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/cuteDslKernels/CMakeLists.txttensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.pycpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp
📚 Learning: 2025-08-18T09:08:07.687Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 6984
File: cpp/tensorrt_llm/CMakeLists.txt:297-299
Timestamp: 2025-08-18T09:08:07.687Z
Learning: In the TensorRT-LLM project, artifacts are manually copied rather than installed via `cmake --install`, so INSTALL_RPATH properties are not needed - only BUILD_RPATH affects the final artifacts.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txt
📚 Learning: 2025-08-08T05:06:31.596Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp:36-36
Timestamp: 2025-08-08T05:06:31.596Z
Learning: CUTLASS extension files (under cpp/tensorrt_llm/cutlass_extensions/) follow CUTLASS coding style conventions, including using #pragma once instead of TRTLLM_ prefixed header guards, even though they are .hpp files.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txtcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/CMakeLists.txtcpp/tensorrt_llm/thop/CMakeLists.txtcpp/tensorrt_llm/kernels/cuteDslKernels/CMakeLists.txtcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp
📚 Learning: 2025-09-23T15:01:00.070Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/config.cu:15-17
Timestamp: 2025-09-23T15:01:00.070Z
Learning: In TensorRT-LLM NCCL device kernels (cpp/tensorrt_llm/kernels/nccl_device/config.cu), std::ostringstream is used but <sstream> doesn't need to be explicitly included because it's provided transitively through other headers like tensorrt_llm/common/cudaUtils.h or config.h. Local compilation testing confirms this works without the explicit include.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txtcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/CMakeLists.txtcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h
📚 Learning: 2025-08-06T13:58:07.506Z
Learnt from: galagam
Repo: NVIDIA/TensorRT-LLM PR: 6487
File: tests/unittest/_torch/auto_deploy/unit/singlegpu/test_ad_trtllm_bench.py:1-12
Timestamp: 2025-08-06T13:58:07.506Z
Learning: In TensorRT-LLM, test files (files under tests/ directories) do not require NVIDIA copyright headers, unlike production source code files. Test files typically start directly with imports, docstrings, or code.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txttests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-09-09T09:40:45.658Z
Learnt from: fredricz-20070104
Repo: NVIDIA/TensorRT-LLM PR: 7645
File: tests/integration/test_lists/qa/llm_function_core.txt:648-648
Timestamp: 2025-09-09T09:40:45.658Z
Learning: In TensorRT-LLM test lists, it's common and intentional for the same test to appear in multiple test list files when they serve different purposes (e.g., llm_function_core.txt for comprehensive core functionality testing and llm_function_core_sanity.txt for quick sanity checks). This duplication allows tests to be run in different testing contexts.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txttests/integration/test_lists/test-db/l0_b200.ymltests/integration/test_lists/test-db/l0_dgx_b200.ymltensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
📚 Learning: 2025-09-16T09:30:09.716Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 7763
File: cpp/tensorrt_llm/CMakeLists.txt:297-301
Timestamp: 2025-09-16T09:30:09.716Z
Learning: In the TensorRT-LLM project, NCCL libraries are loaded earlier by PyTorch libraries or the bindings library, so the main shared library doesn't need NCCL paths in its RPATH - the libraries will already be available in the process address space when needed.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txt
📚 Learning: 2025-09-23T15:13:48.819Z
Learnt from: nv-lschneider
Repo: NVIDIA/TensorRT-LLM PR: 7910
File: cpp/tensorrt_llm/kernels/nccl_device/multimem.h:20-30
Timestamp: 2025-09-23T15:13:48.819Z
Learning: TRT-LLM targets modern CUDA toolkits that support FP8 datatypes, so cuda_fp8.h can be included unconditionally without version guards in TRT-LLM code.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txtcpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.hcpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/thop/fp4Quantize.cpp
📚 Learning: 2025-10-22T06:53:47.017Z
Learnt from: xinhe-nv
Repo: NVIDIA/TensorRT-LLM PR: 8534
File: scripts/format_test_list.py:1-6
Timestamp: 2025-10-22T06:53:47.017Z
Learning: The file `scripts/format_test_list.py` in the TensorRT-LLM repository does not require the NVIDIA Apache-2.0 copyright header.
Applied to files:
cpp/tensorrt_llm/CMakeLists.txt
📚 Learning: 2025-08-08T04:10:19.038Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6728
File: cpp/tensorrt_llm/plugins/mixtureOfExperts/mixtureOfExpertsPlugin.cpp:966-966
Timestamp: 2025-08-08T04:10:19.038Z
Learning: TensorRT plugins currently don't support padding functionality, and TensorRT is not getting new features (in maintenance mode). This means that duplicating parameters like mExpertHiddenSize in function calls, even with TODO comments, can be acceptable as pragmatic solutions within these constraints.
Applied to files:
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/RoutingRenormalize.cucpp/tensorrt_llm/thop/moeUtilOp.cpp
📚 Learning: 2025-09-17T02:48:52.732Z
Learnt from: tongyuantongyu
Repo: NVIDIA/TensorRT-LLM PR: 7781
File: tests/integration/test_lists/waives.txt:313-313
Timestamp: 2025-09-17T02:48:52.732Z
Learning: In TensorRT-LLM, `tests/integration/test_lists/waives.txt` is specifically for waiving/skipping tests, while other test list files like those in `test-db/` and `qa/` directories are for different test execution contexts (pre-merge, post-merge, QA tests). The same test appearing in both waives.txt and execution list files is intentional - the test is part of test suites but will be skipped due to the waiver.
Applied to files:
tests/integration/test_lists/test-db/l0_b200.ymltests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-08-26T09:49:04.956Z
Learnt from: pengbowang-nv
Repo: NVIDIA/TensorRT-LLM PR: 7192
File: tests/integration/test_lists/test-db/l0_dgx_b200.yml:56-72
Timestamp: 2025-08-26T09:49:04.956Z
Learning: In TensorRT-LLM test configuration files, the test scheduling system handles wildcard matching with special rules that prevent duplicate test execution even when the same tests appear in multiple yaml files with overlapping GPU wildcards (e.g., "*b200*" and "*gb200*").
Applied to files:
tests/integration/test_lists/test-db/l0_b200.ymltests/integration/test_lists/test-db/l0_dgx_b200.yml
📚 Learning: 2025-07-28T17:06:08.621Z
Learnt from: moraxu
Repo: NVIDIA/TensorRT-LLM PR: 6303
File: tests/integration/test_lists/qa/examples_test_list.txt:494-494
Timestamp: 2025-07-28T17:06:08.621Z
Learning: In TensorRT-LLM testing, it's common to have both CLI flow tests (test_cli_flow.py) and PyTorch API tests (test_llm_api_pytorch.py) for the same model. These serve different purposes: CLI flow tests validate the traditional command-line workflow, while PyTorch API tests validate the newer LLM API backend. Both are legitimate and should coexist.
Applied to files:
tests/integration/test_lists/test-db/l0_b200.ymltests/integration/test_lists/test-db/l0_dgx_b200.ymltests/integration/defs/accuracy/test_llm_api_pytorch.py
📚 Learning: 2025-08-14T06:36:40.701Z
Learnt from: timlee0212
Repo: NVIDIA/TensorRT-LLM PR: 6886
File: tensorrt_llm/_torch/models/modeling_deepseekv3.py:0-0
Timestamp: 2025-08-14T06:36:40.701Z
Learning: In DeepSeek V3 model (tensorrt_llm/_torch/models/modeling_deepseekv3.py), the disagreement between AllReduce.__init__ guard and _compute_mlp_tp_size logic for MNNVL usage is expected by design. The AllReduce component and MLP TP-size computation intentionally use different criteria for MNNVL availability decisions.
Applied to files:
tests/integration/test_lists/test-db/l0_b200.ymltensorrt_llm/_torch/models/modeling_deepseekv3.pycpp/tensorrt_llm/thop/moeUtilOp.cpp
📚 Learning: 2025-08-19T12:45:11.997Z
Learnt from: amitz-nv
Repo: NVIDIA/TensorRT-LLM PR: 7033
File: tensorrt_llm/_torch/pyexecutor/model_engine.py:0-0
Timestamp: 2025-08-19T12:45:11.997Z
Learning: In tensorrt_llm/_torch/pyexecutor/model_engine.py, DoRA (Delta Orthogonal Rank Adaptation) functionality was removed from the PyTorch flow to eliminate issues with inverted DoRA detection logic. The original is_dora condition was checking if scaling_vec_pointer == 0, which was potentially incorrect.
Applied to files:
tensorrt_llm/_torch/models/modeling_deepseekv3.pycpp/tensorrt_llm/thop/moeUtilOp.cpptensorrt_llm/_torch/autotuner.pycpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cu
📚 Learning: 2025-08-14T23:23:27.449Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 6915
File: cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu:4010-4012
Timestamp: 2025-08-14T23:23:27.449Z
Learning: For MOE (Mixture of Experts) code reviews in TensorRT-LLM, avoid repeatedly suggesting finalize fusion validation checks and safety assertions. The user djns99 has indicated these suggestions are repetitive and unwanted across multiple MOE-related changes.
Applied to files:
cpp/tensorrt_llm/thop/moeUtilOp.cppcpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cutensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.pytests/integration/defs/accuracy/test_llm_api_pytorch.pycpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cucpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp
📚 Learning: 2025-10-20T17:09:21.560Z
Learnt from: nvchenghaoz
Repo: NVIDIA/TensorRT-LLM PR: 8469
File: tensorrt_llm/_torch/auto_deploy/transform/library/rms_norm.py:180-182
Timestamp: 2025-10-20T17:09:21.560Z
Learning: In tensorrt_llm/_torch/auto_deploy/transform/library/rms_norm.py, the _gated_rmsnorm_replacement function does not need to cast the output of torch.ops.auto_deploy.torch_rmsnorm_gated back to the input dtype, even though the custom op returns fp32. The dtype handling is managed elsewhere or the fp32 output is acceptable for downstream consumers.
Applied to files:
tensorrt_llm/_torch/autotuner.py
📚 Learning: 2025-08-21T02:41:10.565Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_gemm_kernels.h:141-145
Timestamp: 2025-08-21T02:41:10.565Z
Learning: In TensorRT-LLM MOE GEMM kernels (cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_gemm_kernels.h), the stride_act and stride_weight pointers in TmaWarpSpecializedGroupedGemmInput are intentionally declared as void* rather than typed pointers because the actual stride type is determined at runtime based on factors like the swap_ab flag and layout decisions. This runtime type determination makes compile-time type safety impossible, so void* is the correct approach.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.cucpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h
📚 Learning: 2025-08-22T01:54:35.850Z
Learnt from: djns99
Repo: NVIDIA/TensorRT-LLM PR: 7104
File: cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h:999-1000
Timestamp: 2025-08-22T01:54:35.850Z
Learning: The `internal_cutlass_kernels` directory in TensorRT-LLM is a mirror of an internal NVIDIA repository and maintains its own implementation and API that may diverge from the public `cutlass_kernels` version. API inconsistencies between these two directories are intentional and by design, not bugs to be fixed.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.hcpp/tensorrt_llm/kernels/CMakeLists.txttensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.pycpp/tensorrt_llm/kernels/cuteDslKernels/CMakeLists.txttensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.pycpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h
📚 Learning: 2025-08-08T22:03:28.403Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/kernels/internal_cutlass_kernels/include/moe_gemm_kernels.h:152-154
Timestamp: 2025-08-08T22:03:28.403Z
Learning: In CUTLASS, `TagToStrideC_t` template is defined for both pointer types (e.g., `Layout*`) and non-pointer types (e.g., `Layout`). When used with pointer types, it's often wrapped with `std::remove_pointer_t`, while non-pointer usage is direct. Both `cutlass::detail::TagToStrideC_t` and `cutlass::gemm::TagToStrideC_t` support both forms.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu
📚 Learning: 2025-08-08T05:10:38.906Z
Learnt from: sklevtsov-nvidia
Repo: NVIDIA/TensorRT-LLM PR: 3294
File: cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp:0-0
Timestamp: 2025-08-08T05:10:38.906Z
Learning: The ScaledAccPerRowBiasPerColScaleScatter fusion in CUTLASS extensions (cpp/tensorrt_llm/cutlass_extensions/include/cutlass_extensions/epilogue/fusion/sm90_visitor_scatter.hpp) is specifically designed for per-column scaling factors only, so it uses a fixed Stride<_0,_1,int64_t> rather than conditional stride logic.
Applied to files:
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cucpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h
📚 Learning: 2025-10-20T17:07:18.745Z
Learnt from: nvchenghaoz
Repo: NVIDIA/TensorRT-LLM PR: 8469
File: tensorrt_llm/_torch/auto_deploy/models/patches/nemotron_h.py:98-116
Timestamp: 2025-10-20T17:07:18.745Z
Learning: In NemotronH models (tensorrt_llm/_torch/auto_deploy/models/patches/nemotron_h.py), the gate (self.gate) returns topk_indices and topk_weights that are already in the correct shape to be passed directly to torch_ops.auto_deploy.torch_moe without needing to reshape them when hidden_states is flattened.
Applied to files:
tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py
📚 Learning: 2025-08-14T15:38:01.771Z
Learnt from: MatthiasKohl
Repo: NVIDIA/TensorRT-LLM PR: 6904
File: cpp/tensorrt_llm/pybind/thop/bindings.cpp:55-57
Timestamp: 2025-08-14T15:38:01.771Z
Learning: In TensorRT-LLM Python bindings, tensor parameter collections like mla_tensor_params and spec_decoding_tensor_params are kept as required parameters without defaults to maintain API consistency, even when it might affect backward compatibility.
Applied to files:
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
🧬 Code graph analysis (9)
tensorrt_llm/_torch/autotuner.py (1)
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py (1)
gen_tuning_buckets(369-373)
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.h (2)
cpp/tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h (1)
tensorrt_llm(39-147)cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cu (9)
void(58-113)void(182-235)void(280-356)moePermute(116-160)moePermute(116-119)moeUnpermute(238-263)moeUnpermute(238-240)moeActivation(359-417)moeActivation(359-362)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.py (1)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/custom_pipeline.py (5)
PipelineTmaUmma(73-269)PipelineUmmaAsync(273-376)producer_acquire(231-255)producer_tail(364-376)consumer_release(217-229)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py (4)
tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py (1)
allgather(97-102)tensorrt_llm/_torch/utils.py (2)
Fp4QuantizedTensor(110-117)shape(116-117)cpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp (8)
moe_sort(112-125)moe_sort(112-114)moe_permute(129-200)moe_permute(129-132)moe_swiglu_nvfp4_quantize(305-359)moe_swiglu_nvfp4_quantize(305-307)moe_unpermute(204-254)moe_unpermute(204-205)tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py (1)
cute_dsl_nvfp4_grouped_gemm_blackwell(628-661)
tests/integration/defs/accuracy/test_llm_api_pytorch.py (2)
tests/integration/defs/conftest.py (2)
parametrize_with_ids(1818-1844)get_sm_version(1890-1893)tensorrt_llm/_utils.py (1)
get_sm_version(733-735)
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py (5)
tensorrt_llm/_torch/autotuner.py (4)
ConstraintSpec(39-49)DynamicTensorSpec(23-35)TuningConfig(53-101)get(545-548)tensorrt_llm/_torch/utils.py (3)
fp4_scale_infer_shape(262-267)get_last_power_of_2_num_tokens_buckets(252-259)last_positive_power_of_2(229-234)tensorrt_llm/_torch/cute_dsl_kernels/blackwell/dense_blockscaled_gemm_persistent.py (3)
Sm100BlockScaledPersistentDenseGemmKernel(65-1877)Sm100BlockScaledPersistentDenseGemmKernelWrapper(1901-2015)can_implement(1821-1877)tensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.py (3)
Sm100BlockScaledPersistentGroupedGemmKernel(56-2285)can_implement(2142-2225)wrapper(2228-2285)tensorrt_llm/_torch/cute_dsl_kernels/blackwell/utils.py (2)
make_ptr(142-188)dtype(118-119)
tests/unittest/_torch/thop/parallel/test_cute_dsl_moe.py (4)
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py (10)
GroupedGemmInputsHelper(341-415)get_max_num_permuted_tokens(359-360)infer_num_tokens(362-367)gen_tuning_buckets(369-373)map_to_tuning_buckets(375-377)get_max_num_tiles(351-357)_(325-339)_(665-683)_(879-899)cute_dsl_nvfp4_grouped_gemm_blackwell(628-661)tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py (1)
cute_dsl_nvfp4_grouped_gemm_ref(93-149)tensorrt_llm/_torch/utils.py (1)
unswizzle_sf(144-159)cpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp (10)
moe_sort(112-125)moe_sort(112-114)moe_permute(129-200)moe_permute(129-132)moe_unpermute(204-254)moe_unpermute(204-205)moe_swiglu(257-303)moe_swiglu(257-258)moe_swiglu_nvfp4_quantize(305-359)moe_swiglu_nvfp4_quantize(305-307)
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.cu (2)
cpp/tensorrt_llm/kernels/cutlass_kernels/moe_gemm/moe_kernels.cu (16)
void(156-275)void(309-398)void(564-613)void(660-707)void(710-740)void(799-826)void(1022-1067)void(1070-1082)void(1102-1141)void(1143-1195)void(1198-1236)void(1240-1335)void(1361-1566)void(1683-1757)void(1762-1865)void(1943-1995)cpp/include/tensorrt_llm/common/cudaUtils.h (1)
getMultiProcessorCount(403-450)
cpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp (1)
cpp/tensorrt_llm/kernels/trtllmGenKernels/blockScaleMoe/runner.h (7)
top_k(240-240)n_group(241-241)topk_group(243-243)local_expert_offset(246-246)local_num_experts(247-247)getMaxPermutedPaddedCount(105-110)getMaxNumCtasInBatchDim(75-103)
🪛 Clang (14.0.6)
cpp/tensorrt_llm/kernels/cuteDslKernels/moeUtils.h
[error] 18-18: 'tensorrt_llm/kernels/cutlass_kernels/include/moe_kernels.h' file not found
(clang-diagnostic-error)
cpp/tensorrt_llm/thop/cuteDslMoeUtilsOp.cpp
[error] 17-17: 'tensorrt_llm/kernels/cuteDslKernels/moeUtils.h' file not found
(clang-diagnostic-error)
🪛 Ruff (0.14.4)
tensorrt_llm/_torch/cute_dsl_kernels/blackwell/grouped_blockscaled_gemm_persistent.py
389-389: Avoid specifying long messages outside the exception class
(TRY003)
695-695: Unpacked variable bidy is never used
Prefix it with an underscore or any other dummy variable pattern
(RUF059)
695-695: Unpacked variable bidz is never used
Prefix it with an underscore or any other dummy variable pattern
(RUF059)
1060-1060: Loop control variable k_tile not used within loop body
Rename unused k_tile to _k_tile
(B007)
1282-1282: Loop control variable k_tile not used within loop body
Rename unused k_tile to _k_tile
(B007)
1701-1701: Unused method argument: tidx
(ARG002)
1928-1928: Avoid specifying long messages outside the exception class
(TRY003)
tensorrt_llm/_torch/modules/fused_moe/fused_moe_cute_dsl.py
117-117: Ambiguous variable name: l
(E741)
136-136: Consider [0, *num_tiles_per_expert.cumsum(dim=0).tolist()] instead of concatenation
Replace with [0, *num_tiles_per_expert.cumsum(dim=0).tolist()]
(RUF005)
139-139: zip() without an explicit strict= parameter
Add explicit value for parameter strict=
(B905)
139-139: Prefer itertools.pairwise() over zip() when iterating over successive pairs
Replace zip() with itertools.pairwise()
(RUF007)
223-223: Unused method argument: output_dtype
(ARG002)
224-224: Unused method argument: all_rank_num_tokens
(ARG002)
225-225: Unused method argument: use_dp_padding
(ARG002)
369-369: Unpacked variable total_num_padded_tokens is never used
Prefix it with an underscore or any other dummy variable pattern
(RUF059)
456-458: Avoid specifying long messages outside the exception class
(TRY003)
tensorrt_llm/_torch/custom_ops/cute_dsl_custom_ops.py
418-418: Mutable class attributes should be annotated with typing.ClassVar
(RUF012)
419-419: Mutable class attributes should be annotated with typing.ClassVar
(RUF012)
441-443: Avoid specifying long messages outside the exception class
(TRY003)
448-448: Unused method argument: profile
(ARG002)
449-449: Unused method argument: kwargs
(ARG002)
453-453: Ambiguous variable name: l
(E741)
519-519: Ambiguous variable name: l
(E741)
668-668: Unused function argument: input_scale
(ARG001)
669-669: Unused function argument: weight_scale
(ARG001)
670-670: Unused function argument: alpha
(ARG001)
671-671: Unused function argument: tile_idx_to_group_idx
(ARG001)
672-672: Unused function argument: num_non_exiting_tiles
(ARG001)
673-673: Unused function argument: num_experts
(ARG001)
674-674: Unused function argument: top_k
(ARG001)
675-675: Unused function argument: num_local_experts
(ARG001)
676-676: Unused function argument: local_expert_offset
(ARG001)
677-677: Unused function argument: tile_size
(ARG001)
679-679: Unused function argument: scaling_vector_size
(ARG001)
717-717: Mutable class attributes should be annotated with typing.ClassVar
(RUF012)
738-738: Unused method argument: inputs
(ARG002)
739-739: Unused method argument: profile
(ARG002)
740-740: Unused method argument: kwargs
(ARG002)
772-772: Unpacked variable total_num_padded_tokens is never used
Prefix it with an underscore or any other dummy variable pattern
(RUF059)
881-881: Unused function argument: input_scale
(ARG001)
882-882: Unused function argument: token_selected_experts
(ARG001)
883-883: Unused function argument: token_final_scales
(ARG001)
884-884: Unused function argument: gemm1_weight
(ARG001)
885-885: Unused function argument: gemm1_weight_scale
(ARG001)
886-886: Unused function argument: gemm1_alpha
(ARG001)
887-887: Unused function argument: gemm2_input_global_scale
(ARG001)
888-888: Unused function argument: gemm2_weight
(ARG001)
889-889: Unused function argument: gemm2_weight_scale
(ARG001)
890-890: Unused function argument: gemm2_alpha
(ARG001)
891-891: Unused function argument: num_experts
(ARG001)
892-892: Unused function argument: top_k
(ARG001)
893-893: Unused function argument: num_local_experts
(ARG001)
894-894: Unused function argument: local_expert_offset
(ARG001)
896-896: Unused function argument: scaling_vector_size
(ARG001)
tests/unittest/_torch/thop/parallel/test_cute_dsl_moe.py
306-306: Loop control variable i not used within loop body
Rename unused i to _i
(B007)
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hyukn
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Overall looks good to me. Some comments about the fallback implementations.
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…#8880) Signed-off-by: Enwei Zhu <21126786+syuoni@users.noreply.github.com> Signed-off-by: lkomali <lkomali@nvidia.com>
[TRTLLM-9286][feat] Integration of CuteDSL NVFP4 grouped GEMM
Description
This PR integrates CuteDSL NVFP4 grouped GEMM for CuteDSL MoE backend. It supports B200/GB200 NVFP4.
The accuracy on GSM8K looks good:
Test Coverage
PR Checklist
Please review the following before submitting your PR:
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PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.
Test cases are provided for new code paths (see test instructions)
Any new dependencies have been scanned for license and vulnerabilities
CODEOWNERS updated if ownership changes
Documentation updated as needed
The reviewers assigned automatically/manually are appropriate for the PR.
Please check this after reviewing the above items as appropriate for this PR.
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Summary by CodeRabbit
New Features
Refactor
Chores