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@JunyiXu-nv JunyiXu-nv commented Oct 16, 2025

Summary by CodeRabbit

  • New Features
    • Added support for a disable_deep_gemm configuration option in the Exaone4 model, which automatically activates when using FP8 block scales quantization. This option controls computation behavior in the attention and feedforward components, enabling optimized performance with specific quantization settings.

Description

CUDA illegal memory access issue appears when using deep_gemm fp8 gemm in EXAONE-4.0-32B-FP8.

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@JunyiXu-nv JunyiXu-nv requested a review from a team as a code owner October 16, 2025 13:40
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📝 Walkthrough

Walkthrough

This PR adds a disable_deep_gemm parameter to the Exaone4Attention module. The parameter is computed in Exaone4DecoderLayer based on quantization configuration (FP8_BLOCK_SCALES) and propagated to both Exaone4Attention and GatedMLP during initialization.

Changes

Cohort / File(s) Summary
Parameter Addition & Method Signature Updates
tensorrt_llm/_torch/models/modeling_exaone4.py
Added disable_deep_gemm: bool = False parameter to Exaone4Attention.__init__(). Updated method signatures and parameter forwarding logic to support the new flag in both Exaone4Attention and GatedMLP.
Quantization-Driven Configuration Logic
tensorrt_llm/_torch/models/modeling_exaone4.py
Introduced QuantAlgo import and conditional computation of disable_deep_gemm in Exaone4DecoderLayer based on quant_config.quant_algo == QuantAlgo.FP8_BLOCK_SCALES. Flag is computed during initialization and propagated to dependent components.
Conditional Constraint Enforcement
tensorrt_llm/_torch/models/modeling_exaone4.py
Added conditional assertion logic in Exaone4Attention to ensure fuse_qk_norm_rope behavior respects the new disable_deep_gemm setting while preserving existing behavior when not applicable.

Sequence Diagram

sequenceDiagram
    actor Init as Initialization
    participant DL as Exaone4DecoderLayer
    participant QC as quant_config
    participant Attn as Exaone4Attention
    participant MLP as GatedMLP

    Init->>DL: __init__(quant_config, ...)
    DL->>QC: check quant_algo
    alt quant_algo == FP8_BLOCK_SCALES
        QC-->>DL: True
        DL->>DL: disable_deep_gemm = True
    else Other algo
        QC-->>DL: False
        DL->>DL: disable_deep_gemm = False
    end
    DL->>Attn: __init__(..., disable_deep_gemm)
    DL->>MLP: __init__(..., disable_deep_gemm)
    Attn-->>DL: initialized
    MLP-->>DL: initialized
Loading

Estimated code review effort

🎯 2 (Simple) | ⏱️ ~12 minutes

The changes involve straightforward parameter additions and propagation within a single file. The logic is cohesive and localized to configuration-driven initialization flows. Moderate complexity arises from understanding the quantization algorithm condition and how the flag affects attention behavior, but the edits are consistent and follow a clear pattern.

Pre-merge checks and finishing touches

❌ Failed checks (2 warnings)
Check name Status Explanation Resolution
Docstring Coverage ⚠️ Warning Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. You can run @coderabbitai generate docstrings to improve docstring coverage.
Description Check ⚠️ Warning The pull request description is largely incomplete and does not meet the requirements of the provided template. While the Description section identifies the issue ("CUDA illegal memory access issue appears when using deep_gemm fp8 gemm in EXAONE-4.0-32B-FP8"), it does not explain the solution being implemented. More critically, the Test Coverage section is entirely empty—no tests are listed or described to safeguard the changes, and most items in the PR Checklist remain unchecked, suggesting inadequate review against the stated guidelines. According to the template, test coverage information is essential for ensuring sufficient test coverage for code changes. The author should expand the Description section to clearly explain both the problem and the solution (e.g., how disabling deep_gemm resolves the issue). Most importantly, the Test Coverage section must be completed with a list of relevant tests that validate the changes for the EXAONE-4.0-32B-FP8 model, particularly around quantization and attention mechanisms. Additionally, the PR Checklist items should be reviewed and appropriately checked or addressed to demonstrate compliance with coding guidelines and testing requirements.
✅ Passed checks (1 passed)
Check name Status Explanation
Title Check ✅ Passed The title clearly identifies the tracked NVBugs issue, uses the correct “[fix]” type tag, and concisely summarizes the main change of disabling FP8 deep GEMM for the EXAONE-4.0-32B-FP8 configuration, making it specific and immediately informative to reviewers.
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Actionable comments posted: 1

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Reviewing files that changed from the base of the PR and between 20c2de4 and 813c7e1.

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  • tensorrt_llm/_torch/models/modeling_exaone4.py (5 hunks)
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🔇 Additional comments (4)
tensorrt_llm/_torch/models/modeling_exaone4.py (4)

58-59: LGTM! Parameter addition is correct.

The disable_deep_gemm parameter is properly added with a sensible default of False for backward compatibility and correctly forwarded to the parent class. This enables selective disabling of deep_gemm for specific quantization configurations.

Also applies to: 93-93


134-139: LGTM! Logic correctly identifies when to disable deep_gemm.

The implementation correctly:

  • Uses defensive programming with getattr to safely access potentially missing attributes
  • Specifically targets FP8_BLOCK_SCALES quantization algorithm as mentioned in the PR objective
  • Includes a clear comment explaining the workaround for the CUDA illegal memory access issue

144-144: LGTM! Parameter correctly propagated to Exaone4Attention.

The disable_deep_gemm flag is correctly passed to Exaone4Attention, which we confirmed accepts this parameter.


154-154: No action needed: GatedMLP init already includes disable_deep_gemm.

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/bot run

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PR_Github #21580 [ run ] triggered by Bot

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PR_Github #21580 [ run ] completed with state DISABLED
L0 testing is limited to prioritized users. User JunyiXu-nv is not in the prioritized list. L0 testing cannot be triggered.

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LGTM. Left one question below.

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/bot run

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PR_Github #21651 [ run ] triggered by Bot

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PR_Github #21651 [ run ] completed with state SUCCESS
/LLM/release-1.1/L0_MergeRequest_PR pipeline #172 completed with status: 'SUCCESS'
Pipeline passed with automatic retried tests. Check the rerun report for details.

@JunyiXu-nv JunyiXu-nv requested a review from kaiyux October 18, 2025 08:03
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/bot run

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PR_Github #21979 [ run ] triggered by Bot. Commit: 98c16af

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PR_Github #21979 [ run ] completed with state SUCCESS. Commit: 98c16af
/LLM/release-1.1/L0_MergeRequest_PR pipeline #205 completed with status: 'SUCCESS'

…B-FP8

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
@JunyiXu-nv JunyiXu-nv force-pushed the dev-junyi-bug-5569713 branch from 3cc3a3d to 6173df7 Compare October 21, 2025 13:26
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PR_Github #22061 [ run ] triggered by Bot. Commit: 6173df7

@JunyiXu-nv JunyiXu-nv enabled auto-merge (squash) October 21, 2025 14:52
@JunyiXu-nv JunyiXu-nv disabled auto-merge October 21, 2025 14:52
@MartinMarciniszyn MartinMarciniszyn enabled auto-merge (squash) October 21, 2025 15:30
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PR_Github #22061 [ run ] completed with state SUCCESS. Commit: 6173df7
/LLM/release-1.1/L0_MergeRequest_PR pipeline #215 completed with status: 'SUCCESS'

@MartinMarciniszyn MartinMarciniszyn merged commit 0acdecb into NVIDIA:release/1.1 Oct 21, 2025
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mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 4, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 4, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 5, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 6, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 10, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 12, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 14, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 17, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 18, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 19, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
mikeiovine pushed a commit to mikeiovine/TensorRT-LLM that referenced this pull request Nov 19, 2025
…B-FP8 (NVIDIA#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
Signed-off-by: Mike Iovine <miovine@nvidia.com>
mikeiovine pushed a commit that referenced this pull request Nov 20, 2025
…B-FP8 (#8429)

Signed-off-by: Junyi Xu <219237550+JunyiXu-nv@users.noreply.github.com>
Signed-off-by: Mike Iovine <6158008+mikeiovine@users.noreply.github.com>
Signed-off-by: Mike Iovine <miovine@nvidia.com>
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