[https://nvbugs/5451205][feat] Add cuBLASLt NVFP4 GEMM backend support #7943
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📝 WalkthroughWalkthroughAdds optional cuBLASLt FP4 GEMM support gated by a new CMake option. Wires compile definitions, implements FP4 GEMM in CublasMMWrapper, introduces a Torch extension (C++/Python) for FP4 scaled matmul, adds availability checks, integrates a selectable path into Linear, and provides unit/perf tests. Changes
Sequence Diagram(s)sequenceDiagram
autonumber
actor User
participant Linear as Linear.apply()
participant Utils as cublaslt_utils.IS_CUBLASLT_AVAILABLE
participant TorchOp as torch.ops.trtllm.cublas_fp4_scaled_mm
participant THOP as cublasFp4ScaledMM.cpp
participant Wrapper as CublasMMWrapper
participant cuBLASLt as cuBLASLt
User->>Linear: call with FP4 weights/scales and flag
Linear->>Utils: check IS_CUBLASLT_AVAILABLE
alt available and flag True
Linear->>TorchOp: cublas_fp4_scaled_mm(A,B,scale_a,scale_b,alpha,beta,out_dtype)
TorchOp->>THOP: dispatch CUDA impl
THOP->>Wrapper: setFP4GemmConfig(BF16)
THOP->>Wrapper: Fp4Gemm(transA, transB, M,N,K, A,B,C, scales, alpha,beta)
Wrapper->>cuBLASLt: create desc, select heuristic, matmul
cuBLASLt-->>Wrapper: status
Wrapper-->>THOP: result
THOP-->>Linear: Tensor
else fallback
Linear-->>User: use existing NVFP4 paths
end
sequenceDiagram
autonumber
participant Import as Python import
participant Utils as cublaslt_utils
participant Torch as torch
Import->>Utils: import IS_CUBLASLT_AVAILABLE
Utils->>Torch: check torch.ops.trtllm.cublas_fp4_scaled_mm
alt op present
Utils-->>Import: IS_CUBLASLT_AVAILABLE = True
else
Utils-->>Import: IS_CUBLASLT_AVAILABLE = False
end
Estimated code review effort🎯 4 (Complex) | ⏱️ ~60 minutes Possibly related PRs
Suggested reviewers
Pre-merge checks and finishing touches❌ Failed checks (1 warning)
✅ Passed checks (2 passed)
✨ Finishing touches
🧪 Generate unit tests (beta)
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Actionable comments posted: 12
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⚠️ Outside diff range comments (1)
cpp/tensorrt_llm/thop/cublasFp4ScaledMM.h (1)
1-34: Add project-required include guards (replace pragma once)Headers must use named guards per guideline (TRTLLM_<FILE_NAME>_H). Replace pragma once with guards.
-#pragma once +#ifndef TRTLLM_CUBLASFP4SCALEDMM_H +#define TRTLLM_CUBLASFP4SCALEDMM_H @@ } // namespace torch_ext + +#endif // TRTLLM_CUBLASFP4SCALEDMM_HOptionally, add brief Doxygen comments for the two declarations.
🧹 Nitpick comments (9)
tensorrt_llm/_torch/cublaslt_utils.py (2)
11-11: Remove redundant f-string.No placeholders present.
- logger.info(f"cuBLASLt FP4 GEMM is available") + logger.info("cuBLASLt FP4 GEMM is available")
10-12: Harden op-availability check against AttributeError.Older/lite builds may not materialize the namespace; guard access.
- if hasattr(torch.ops.trtllm, 'cublas_fp4_scaled_mm'): + trtllm_ns = getattr(torch.ops, "trtllm", None) + if trtllm_ns is not None and hasattr(trtllm_ns, "cublas_fp4_scaled_mm"): logger.info("cuBLASLt FP4 GEMM is available") IS_CUBLASLT_AVAILABLE = Truecpp/tensorrt_llm/common/cublasMMWrapper.h (1)
32-32: Add brief Doxygen for new FP4 APIs.Meets doc requirements for headers.
class CublasMMWrapper { public: + //! Configure GEMM types for FP4 inputs (A/B) and given C/output types. + //! \param outputType Output (C/D) data type, default BF16. + //! Note: Requires CUDA 12.8+ and cuBLASLt. +#if defined(ENABLE_CUBLASLT_FP4_GEMM) && defined(ENABLE_FP4) + void setFP4GemmConfig(cudaDataType_t outputType /* = CUDA_R_16BF */); + + //! Execute scaled FP4 GEMM (block-scales for A/B), using cuBLASLt. + //! A/B must be CUDA_R_4F_E2M1, alpha/beta are 32-bit scalars. + void Fp4Gemm(cublasOperation_t transa, cublasOperation_t transb, int m, int n, int k, + void const* A, int lda, void const* B, int ldb, void* C, int ldc, + void const* a_sf, void const* b_sf, float const* alpha, float const* beta); +#endifcpp/tensorrt_llm/thop/CMakeLists.txt (1)
48-48: Move cublasFp4ScaledMM.cpp under the feature gate to avoid unnecessary/fragile buildsCompile the source only when ENABLE_CUBLASLT_FP4_GEMM is ON. This prevents accidental build/link failures on configurations where cuBLASLt FP4 isn’t enabled and reduces compilation surface.
Apply:
- cublasFp4ScaledMM.cppAnd extend the feature gate below as:
if(ENABLE_CUBLASLT_FP4_GEMM) - target_compile_definitions(th_common PUBLIC ENABLE_CUBLASLT_FP4_GEMM) + target_compile_definitions(th_common PUBLIC ENABLE_CUBLASLT_FP4_GEMM) + target_sources(th_common PRIVATE cublasFp4ScaledMM.cpp) endif()tensorrt_llm/_torch/custom_ops/torch_custom_ops.py (1)
477-493: Silence lint for unused fake-op parametersPrefix unused args to avoid Ruff ARG001 while keeping the signature stable.
-@torch.library.register_fake("trtllm::cublas_fp4_scaled_mm") +@torch.library.register_fake("trtllm::cublas_fp4_scaled_mm") def _( mat_a: torch.Tensor, mat_b: torch.Tensor, - scale_a: torch.Tensor, - scale_b: torch.Tensor, - alpha: torch.Tensor, - beta: torch.Tensor, + _scale_a: torch.Tensor, + _scale_b: torch.Tensor, + _alpha: torch.Tensor, + _beta: torch.Tensor, out_dtype: torch.dtype = torch.bfloat16, ) -> torch.Tensor: """Fake tensor implementation for cuBLASLt FP4 GEMM.""" # Output shape: [M, N] where M = mat_a.size(0), N = mat_b.size(0) output_size = [mat_a.size(0), mat_b.size(0)] return mat_a.new_empty(output_size, dtype=out_dtype)tensorrt_llm/_torch/modules/linear.py (1)
781-784: Use a stable dtype fallback to prevent behavior skew across backendsWhen module.dtype is None, explicitly fall back to input.dtype (matches patterns used elsewhere), avoiding silent BF16 default only on the cuBLASLt path.
- output = torch.ops.trtllm.cublas_fp4_scaled_mm( + output = torch.ops.trtllm.cublas_fp4_scaled_mm( act_fp4, module.weight, act_sf, module.weight_scale, - module.alpha, module.beta, module.dtype) + module.alpha, module.beta, module.dtype or input.dtype)tests/unittest/_torch/thop/parallel/test_fp4_linear.py (3)
439-442: Set explicit tolerances for cross-backend comparisonsSmall numerical diffs are expected; align with perf test tolerances.
- torch.testing.assert_close(output_cublaslt, output_cutlass) + torch.testing.assert_close(output_cublaslt, output_cutlass, rtol=1e-2, atol=1e-2)
445-453: Unused argument in perf test signaturePrefix with underscore to silence linters or implement cold L2 like the CUTLASS path.
-def cublaslt_fp4_gemm_perf_test( +def cublaslt_fp4_gemm_perf_test( dtype, SEQ_LEN, OUTPUT_SIZE, HIDDEN_SIZE, test_ref=True, - use_cold_l2_cache=True, + _use_cold_l2_cache=True, warmup_iterations=2, iterations=1000, ):
519-525: Rename unused loop variableMinor lint fix.
- for i in range(iterations): + for _i in range(iterations): output_cublaslt = torch.ops.trtllm.cublas_fp4_scaled_mm(
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cpp/CMakeLists.txt(1 hunks)cpp/tensorrt_llm/common/CMakeLists.txt(1 hunks)cpp/tensorrt_llm/common/cublasMMWrapper.cpp(4 hunks)cpp/tensorrt_llm/common/cublasMMWrapper.h(2 hunks)cpp/tensorrt_llm/thop/CMakeLists.txt(2 hunks)cpp/tensorrt_llm/thop/cublasFp4ScaledMM.cpp(1 hunks)cpp/tensorrt_llm/thop/cublasFp4ScaledMM.h(1 hunks)tensorrt_llm/_torch/cublaslt_utils.py(1 hunks)tensorrt_llm/_torch/custom_ops/torch_custom_ops.py(1 hunks)tensorrt_llm/_torch/modules/linear.py(5 hunks)tests/unittest/_torch/thop/parallel/test_fp4_linear.py(2 hunks)
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🧠 Learnings (1)
📚 Learning: 2025-09-23T15:13:48.819Z
Learnt from: nv-lschneider
PR: NVIDIA/TensorRT-LLM#7910
File: cpp/tensorrt_llm/kernels/nccl_device/multimem.h:20-30
Timestamp: 2025-09-23T15:13:48.819Z
Learning: TRT-LLM targets modern CUDA toolkits that support FP8 datatypes, so cuda_fp8.h can be included unconditionally without version guards in TRT-LLM code.
Applied to files:
cpp/tensorrt_llm/thop/cublasFp4ScaledMM.hcpp/tensorrt_llm/common/cublasMMWrapper.hcpp/tensorrt_llm/common/cublasMMWrapper.cppcpp/tensorrt_llm/thop/CMakeLists.txt
🧬 Code graph analysis (7)
cpp/tensorrt_llm/thop/cublasFp4ScaledMM.h (1)
cpp/tensorrt_llm/thop/cublasFp4ScaledMM.cpp (4)
cublas_fp4_scaled_mm_out(103-135)cublas_fp4_scaled_mm_out(103-104)cublas_fp4_scaled_mm(137-149)cublas_fp4_scaled_mm(137-138)
tensorrt_llm/_torch/custom_ops/torch_custom_ops.py (1)
tensorrt_llm/_torch/custom_ops/cpp_custom_ops.py (15)
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cpp/tensorrt_llm/common/cublasMMWrapper.h (1)
cpp/tensorrt_llm/common/cublasMMWrapper.cpp (4)
Fp4Gemm(529-587)Fp4Gemm(529-531)setFP4GemmConfig(282-285)setFP4GemmConfig(282-282)
tests/unittest/_torch/thop/parallel/test_fp4_linear.py (3)
cpp/tensorrt_llm/thop/cublasFp4ScaledMM.cpp (2)
cublas_fp4_scaled_mm(137-149)cublas_fp4_scaled_mm(137-138)tensorrt_llm/_torch/custom_ops/torch_custom_ops.py (11)
nvfp4_gemm(435-460)_(249-302)_(378-386)_(464-474)_(480-492)_(661-688)_(721-731)_(805-815)_(905-921)_(1002-1010)_(1043-1054)tensorrt_llm/_torch/autotuner.py (1)
autotune(204-215)
cpp/tensorrt_llm/common/cublasMMWrapper.cpp (1)
cpp/tensorrt_llm/common/cublasMMWrapper.h (8)
mAType(38-38)mBType(39-39)mCType(40-40)mComputeType(41-41)mScaleType(42-42)mADesc(45-158)mBDesc(46-156)mCDesc(47-154)
tensorrt_llm/_torch/modules/linear.py (2)
cpp/tensorrt_llm/thop/cublasFp4ScaledMM.cpp (2)
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cpp/tensorrt_llm/thop/cublasFp4ScaledMM.cpp (2)
cpp/tensorrt_llm/common/cublasMMWrapper.cpp (3)
CublasMMWrapper(31-38)CublasMMWrapper(40-40)CublasMMWrapper(42-47)cpp/tensorrt_llm/common/cublasMMWrapper.h (1)
getCublasHandle(145-148)
🪛 Ruff (0.13.1)
tensorrt_llm/_torch/custom_ops/torch_custom_ops.py
483-483: Unused function argument: scale_a
(ARG001)
484-484: Unused function argument: scale_b
(ARG001)
485-485: Unused function argument: alpha
(ARG001)
486-486: Unused function argument: beta
(ARG001)
tensorrt_llm/_torch/cublaslt_utils.py
11-11: f-string without any placeholders
Remove extraneous f prefix
(F541)
tests/unittest/_torch/thop/parallel/test_fp4_linear.py
450-450: Unused function argument: use_cold_l2_cache
(ARG001)
522-522: Loop control variable i not used within loop body
Rename unused i to _i
(B007)
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🔇 Additional comments (6)
cpp/tensorrt_llm/common/cublasMMWrapper.cpp (2)
295-301: Guard FP4 branch in setGemmConfig to avoid referencing CUDA_R_4F_E2M1 on older toolkits.Keeps builds green without FP4.
- if (mAType == CUDA_R_4F_E2M1) - { - // for cublaslt nvfp4 gemm, fp32 compute type and fp32 scale type are required - mComputeType = CUBLAS_COMPUTE_32F; - mScaleType = CUDA_R_32F; - } - else if (isFp16ComputeType) +#ifdef ENABLE_FP4 + if (mAType == CUDA_R_4F_E2M1) + { + // for cublaslt nvfp4 gemm, fp32 compute type and fp32 scale type are required + mComputeType = CUBLAS_COMPUTE_32F; + mScaleType = CUDA_R_32F; + } + else +#endif + if (isFp16ComputeType)⛔ Skipped due to learnings
Learnt from: nv-lschneider PR: NVIDIA/TensorRT-LLM#7910 File: cpp/tensorrt_llm/kernels/nccl_device/multimem.h:20-30 Timestamp: 2025-09-23T15:13:48.819Z Learning: TRT-LLM targets modern CUDA toolkits that support FP8 datatypes, so cuda_fp8.h can be included unconditionally without version guards in TRT-LLM code.
83-114: Guard FP4 scale-mode attributes with ENABLE_FP4.Scale enums are only available with newer cuBLASLt; guard them.
- // Set scaling modes for FP4 GEMM - if (mAType == CUDA_R_4F_E2M1) - { - // Set scaling mode - cuBLASLt requires e4m3 format scaling factors - cublasLtMatmulMatrixScale_t AScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_VEC16_UE4M3; - cublasLtMatmulMatrixScale_t BScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_VEC16_UE4M3; - cublasLtMatmulMatrixScale_t CScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_SCALAR_32F; - cublasLtMatmulMatrixScale_t DScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_SCALAR_32F; - cublasLtMatmulMatrixScale_t DOutScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_SCALAR_32F; + // Set scaling modes for FP4 GEMM +#ifdef ENABLE_FP4 + if (mAType == CUDA_R_4F_E2M1) + { + // cuBLASLt requires e4m3 scale vectors for FP4 inputs + cublasLtMatmulMatrixScale_t AScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_VEC16_UE4M3; + cublasLtMatmulMatrixScale_t BScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_VEC16_UE4M3; + cublasLtMatmulMatrixScale_t CScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_SCALAR_32F; + cublasLtMatmulMatrixScale_t DScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_SCALAR_32F; + cublasLtMatmulMatrixScale_t DOutScaleMode = CUBLASLT_MATMUL_MATRIX_SCALE_SCALAR_32F; check_cuda_error(cublasLtMatmulDescSetAttribute( mOperationDesc, CUBLASLT_MATMUL_DESC_A_SCALE_MODE, &AScaleMode, sizeof(AScaleMode))); check_cuda_error(cublasLtMatmulDescSetAttribute( mOperationDesc, CUBLASLT_MATMUL_DESC_B_SCALE_MODE, &BScaleMode, sizeof(BScaleMode))); check_cuda_error(cublasLtMatmulDescSetAttribute( mOperationDesc, CUBLASLT_MATMUL_DESC_C_SCALE_MODE, &CScaleMode, sizeof(CScaleMode))); check_cuda_error(cublasLtMatmulDescSetAttribute( mOperationDesc, CUBLASLT_MATMUL_DESC_D_SCALE_MODE, &DScaleMode, sizeof(DScaleMode))); check_cuda_error(cublasLtMatmulDescSetAttribute( mOperationDesc, CUBLASLT_MATMUL_DESC_D_OUT_SCALE_MODE, &DOutScaleMode, sizeof(DOutScaleMode))); // Set C/D matrix scale pointers to nullptr void const* c_scale_ptr = nullptr; void const* d_scale_ptr = nullptr; void const* d_out_scale_ptr = nullptr; check_cuda_error(cublasLtMatmulDescSetAttribute( mOperationDesc, CUBLASLT_MATMUL_DESC_C_SCALE_POINTER, &c_scale_ptr, sizeof(c_scale_ptr))); check_cuda_error(cublasLtMatmulDescSetAttribute( mOperationDesc, CUBLASLT_MATMUL_DESC_D_SCALE_POINTER, &d_scale_ptr, sizeof(d_scale_ptr))); check_cuda_error(cublasLtMatmulDescSetAttribute( mOperationDesc, CUBLASLT_MATMUL_DESC_D_OUT_SCALE_POINTER, &d_out_scale_ptr, sizeof(d_out_scale_ptr))); } +#endif⛔ Skipped due to learnings
Learnt from: nv-lschneider PR: NVIDIA/TensorRT-LLM#7910 File: cpp/tensorrt_llm/kernels/nccl_device/multimem.h:20-30 Timestamp: 2025-09-23T15:13:48.819Z Learning: TRT-LLM targets modern CUDA toolkits that support FP8 datatypes, so cuda_fp8.h can be included unconditionally without version guards in TRT-LLM code.tensorrt_llm/_torch/modules/linear.py (4)
26-26: Import of IS_CUBLASLT_AVAILABLE: LGTMAvailability gating import looks correct and localized.
750-752: Initialize beta to zero: LGTMZero-initialized beta avoids using uninitialized output when beta != 0 in GEMM semantics.
1816-1818: New flag plumbing for cuBLASLt path: LGTMConstructor flag is opt-in and defaults to False; preserves original behavior.
1836-1837: State wiring for cuBLASLt flag: LGTMField assignment matches constructor argument; consistent with other flags.
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I left some comments inline. Thank you!
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Signed-off-by: Shijie Wang <jaywan@nvidia.com>
Signed-off-by: Shijie Wang <jaywan@nvidia.com>
Signed-off-by: Shijie Wang <jaywan@nvidia.com>
Signed-off-by: Shijie Wang <jaywan@nvidia.com>
Signed-off-by: Shijie Wang <jaywan@nvidia.com>
Signed-off-by: Shijie Wang <jaywan@nvidia.com>
Signed-off-by: Shijie Wang <jaywan@nvidia.com>
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LGTM. I suggest enabling DEBUG logger to use UT to check that tuning happens as expected and AutoTuner cache is filled with correct shapes.
Signed-off-by: Shijie Wang <jaywan@nvidia.com>
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PR looks good and shows perf improvement. Thanks a lot and good work!
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NVIDIA#7943) Signed-off-by: Shijie Wang <jaywan@nvidia.com> Signed-off-by: yufeiwu-nv <230315618+yufeiwu-nv@users.noreply.github.com>
NVIDIA#7943) Signed-off-by: Shijie Wang <jaywan@nvidia.com>
NVIDIA#7943) Signed-off-by: Shijie Wang <jaywan@nvidia.com>
NVIDIA#7943) Signed-off-by: Shijie Wang <jaywan@nvidia.com>
NVIDIA#7943) Signed-off-by: Shijie Wang <jaywan@nvidia.com>
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Summary by CodeRabbit
New Features
(torch.ops.trtllm.cublas_fp4_scaled_mm).Performance
Tests
Description
Test Coverage
op UT:
pytest -s -o log_cli=true tests/unittest/_torch/thop/parallel/test_fp4_linear.py -k "test_fp4_linear_cublaslt"
model UT:
pytest -s -o log_cli=true "tests/integration/defs/accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4"
Perf
All tests use autotune to traverse and select the fastest kernel.
PR Checklist
Please review the following before submitting your PR:
PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.
PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.
Test cases are provided for new code paths (see test instructions)
Any new dependencies have been scanned for license and vulnerabilities
CODEOWNERS updated if ownership changes
Documentation updated as needed
The reviewers assigned automatically/manually are appropriate for the PR.
Please check this after reviewing the above items as appropriate for this PR.
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