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Finished RA4M2 system library
1 parent 91d1ffc commit e2dcba2

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2 files changed

+9
-45
lines changed

2 files changed

+9
-45
lines changed
Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,3 @@
11
if(${MCU_NAME} MATCHES "^R7FA4M2AB3CFL$|^R7FA4M2AB3CFM$|^R7FA4M2AB3CFP$|^R7FA4M2AB3CNE$|^R7FA4M2AC3CFL$|^R7FA4M2AC3CFM$|^R7FA4M2AC3CFP$|^R7FA4M2AC3CNE$|^R7FA4M2AD3CFL$|^R7FA4M2AD3CFM$|^R7FA4M2AD3CFP$|^R7FA4M2AD3CNE$")
2-
list(APPEND local_list_macros "getClockValue(_clock) (_clock/1000UL/9)")
2+
list(APPEND local_list_macros "getClockValue(_clock) (_clock/1000UL/3)")
33
endif()

ARM/gcc_clang/system/src/renesas/ra4m2/init_clock.c

Lines changed: 8 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,6 @@
4242
#include "core_header.h"
4343
#include "mcu.h"
4444

45-
4645
extern void * __Vectors[];
4746

4847
typedef struct
@@ -346,39 +345,6 @@ const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENT
346345

347346
// -----------------------------------------------------------------------------------------
348347

349-
/***********************************************************************
350-
* ID Code Configuration for On-Chip Flash Protection
351-
* This section places the user-defined 128-bit ID code into a special
352-
* memory section. These values can be used to lock/unlock the flash.
353-
*
354-
* If BSP_FEATURE_BSP_OSIS_PADDING is enabled, each 32-bit word is
355-
* followed by 0xFFFFFFFF as padding.
356-
***********************************************************************/
357-
#if BSP_FEATURE_FLASH_SUPPORTS_ID_CODE == 1
358-
359-
/** ID code values (4 x 32-bit, optionally padded) */
360-
BSP_DONT_REMOVE static const uint32_t g_bsp_id_codes[] BSP_PLACE_IN_SECTION(BSP_SECTION_ID_CODE) =
361-
{
362-
BSP_CFG_ID_CODE_LONG_1,
363-
#if BSP_FEATURE_BSP_OSIS_PADDING
364-
0xFFFFFFFFU, // Padding after ID code 1
365-
#endif
366-
367-
BSP_CFG_ID_CODE_LONG_2,
368-
#if BSP_FEATURE_BSP_OSIS_PADDING
369-
0xFFFFFFFFU, // Padding after ID code 2
370-
#endif
371-
372-
BSP_CFG_ID_CODE_LONG_3,
373-
#if BSP_FEATURE_BSP_OSIS_PADDING
374-
0xFFFFFFFFU, // Padding after ID code 3
375-
#endif
376-
377-
BSP_CFG_ID_CODE_LONG_4
378-
};
379-
380-
#endif // BSP_FEATURE_FLASH_SUPPORTS_ID_CODE
381-
382348
/***********************************************************************
383349
* Option Function Select (OFS) Settings
384350
***********************************************************************/
@@ -591,18 +557,18 @@ void SystemInit(void)
591557
// Enable MSP monitoring
592558
R_MPU_SPMON->SP[0].CTL = 1U;
593559

594-
memcpy(
595-
&__ram_from_flash$$Base,
596-
&__ram_from_flash$$Load,
597-
(uint32_t)&__ram_from_flash$$Limit - (uint32_t)&__ram_from_flash$$Base
598-
);
599-
600560
memset(
601561
&__ram_zero$$Base,
602562
0,
603563
(uint32_t)&__ram_zero$$Limit - (uint32_t)&__ram_zero$$Base
604564
);
605565

566+
memcpy(
567+
&__ram_from_flash$$Base,
568+
&__ram_from_flash$$Load,
569+
(uint32_t)&__ram_from_flash$$Limit - (uint32_t)&__ram_from_flash$$Base
570+
);
571+
606572
int32_t count = __init_array_end - __init_array_start;
607573
for (int32_t i = 0; i < count; i++)
608574
{
@@ -699,9 +665,7 @@ static void system_clock_configuration() {
699665

700666
Delay_1ms();
701667

702-
if ( 80000 < FOSC_KHZ_VALUE && 120000 >= FOSC_KHZ_VALUE ) {
703-
R_FCACHE->FLWT = 2; // 2 waits
704-
} else if ( 40000 < FOSC_KHZ_VALUE ) {
668+
if ( 50000 < FOSC_KHZ_VALUE ) {
705669
R_FCACHE->FLWT = 1; // 1 wait
706670
} else {
707671
R_FCACHE->FLWT = 0; // 0 waits
@@ -719,4 +683,4 @@ static void system_clock_configuration() {
719683

720684
// Lock write protection register
721685
R_SYSTEM->PRCR = (uint16_t) BSP_PRV_PRCR_LOCK;
722-
}
686+
}

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