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base repository: LeelaChessZero/lc0
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base: master
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head repository: LeelaChessZero/lc0
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compare: release/0.28
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  • 20 commits
  • 37 files changed
  • 8 contributors

Commits on Jun 16, 2021

  1. update version for release

    @borg323
    borg323 committed Jun 16, 2021
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Commits on Aug 20, 2021

  1. Merge branch 'master' into release/0.28

    @borg323
    borg323 committed Aug 20, 2021
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  2. bump for rc2

    @borg323
    borg323 committed Aug 20, 2021
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Commits on Aug 25, 2021

  1. Merge branch 'master' into release/0.28

    @borg323
    borg323 committed Aug 25, 2021
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  2. Mark 0.28.0 final.

    @borg323
    borg323 committed Aug 25, 2021
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Commits on Dec 5, 2021

  1. Upstream a rescorer patch that was missed in the big import. (#1637)

    @Tilps @borg323
    Tilps authored and borg323 committed Dec 5, 2021
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  2. More correctly clear some fields when doing a v5 upgrade. (#1638)

    @Tilps @borg323
    Tilps authored and borg323 committed Dec 5, 2021
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  3. Update 0.27 to 0.28 (#1635) 

    Forgotten during the 0.28 release.
    @cn4750 @borg323
    cn4750 authored and borg323 committed Dec 5, 2021
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  4. onnx backend fixes (#1644)

    @borg323
    borg323 committed Dec 5, 2021
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  5. loader fix for nets with onnx model (#1648)

    @borg323
    borg323 committed Dec 5, 2021
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  6. fix for windows builds of onnx (#1652)

    @borg323
    borg323 committed Dec 5, 2021
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  7. Update linux build instructions (#1651)

    @holmanb @borg323
    holmanb authored and borg323 committed Dec 5, 2021
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  8. Update README.md (#1636)

    @TwilightSublime @borg323
    TwilightSublime authored and borg323 committed Dec 5, 2021
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  9. A command line tool to do various Leela related stuff. (#1653)

    @mooskagh @borg323
    mooskagh authored and borg323 committed Dec 5, 2021
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  10. implement dense policy for onnx backend (#1656)

    @borg323
    borg323 committed Dec 5, 2021
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  11. Add support for res-block-fusing opt for 512 filter networks on Ampere ( 

    #1661)

 * Use a special kernel for handling > 384 filter res block fusion that allocates board[8][8] array in shared memory instead of registers.
 * This works only on Ampere GPUs because the kernel needs more than 64KB shared memory that is available on Turing.
    @ankan-ban @borg323
    ankan-ban authored and borg323 committed Dec 5, 2021
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  12. Update changelog for 0.28.1

    @borg323
    borg323 committed Dec 5, 2021
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  13. Update version for 0.28.1

    @borg323
    borg323 committed Dec 5, 2021
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Commits on Dec 12, 2021

  1. Mark 0.28.1 final.

    @borg323
    borg323 committed Dec 12, 2021
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Commits on Dec 13, 2021

  1. Mark 0.28.2 final.

    @borg323
    borg323 committed Dec 13, 2021
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