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Merge tag 'v4.14.57' into 4.14-main
This is the 4.14.57 stable release
2 parents a7b44ff + ecc160e commit fe6588d

133 files changed

Lines changed: 1697 additions & 471 deletions

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‎Documentation/admin-guide/kernel-parameters.txt‎

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Original file line numberDiff line numberDiff line change
@@ -3997,6 +3997,23 @@
39973997
expediting. Set to zero to disable automatic
39983998
expediting.
39993999

4000+
ssbd= [ARM64,HW]
4001+
Speculative Store Bypass Disable control
4002+
4003+
On CPUs that are vulnerable to the Speculative
4004+
Store Bypass vulnerability and offer a
4005+
firmware based mitigation, this parameter
4006+
indicates how the mitigation should be used:
4007+
4008+
force-on: Unconditionally enable mitigation for
4009+
for both kernel and userspace
4010+
force-off: Unconditionally disable mitigation for
4011+
for both kernel and userspace
4012+
kernel: Always enable mitigation in the
4013+
kernel, and offer a prctl interface
4014+
to allow userspace to register its
4015+
interest in being mitigated too.
4016+
40004017
stack_guard_gap= [MM]
40014018
override the default stack gap protection. The value
40024019
is in page units and it defines how many pages prior

‎Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
# SPDX-License-Identifier: GPL-2.0
22
VERSION = 4
33
PATCHLEVEL = 14
4-
SUBLEVEL = 56
4+
SUBLEVEL = 57
55
EXTRAVERSION =
66
NAME = Petit Gorille
77

‎arch/arm/include/asm/kvm_host.h‎

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Original file line numberDiff line numberDiff line change
@@ -302,4 +302,16 @@ static inline bool kvm_arm_harden_branch_predictor(void)
302302
return false;
303303
}
304304

305+
#define KVM_SSBD_UNKNOWN -1
306+
#define KVM_SSBD_FORCE_DISABLE 0
307+
#define KVM_SSBD_KERNEL 1
308+
#define KVM_SSBD_FORCE_ENABLE 2
309+
#define KVM_SSBD_MITIGATED 3
310+
311+
static inline int kvm_arm_have_ssbd(void)
312+
{
313+
/* No way to detect it yet, pretend it is not there. */
314+
return KVM_SSBD_UNKNOWN;
315+
}
316+
305317
#endif /* __ARM_KVM_HOST_H__ */

‎arch/arm/include/asm/kvm_mmu.h‎

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Original file line numberDiff line numberDiff line change
@@ -28,6 +28,13 @@
2828
*/
2929
#define kern_hyp_va(kva) (kva)
3030

31+
/* Contrary to arm64, there is no need to generate a PC-relative address */
32+
#define hyp_symbol_addr(s) \
33+
({ \
34+
typeof(s) *addr = &(s); \
35+
addr; \
36+
})
37+
3138
/*
3239
* KVM_MMU_CACHE_MIN_PAGES is the number of stage2 page table translation levels.
3340
*/
@@ -247,6 +254,11 @@ static inline int kvm_map_vectors(void)
247254
return 0;
248255
}
249256

257+
static inline int hyp_map_aux_data(void)
258+
{
259+
return 0;
260+
}
261+
250262
#endif /* !__ASSEMBLY__ */
251263

252264
#endif /* __ARM_KVM_MMU_H__ */

‎arch/arm64/Kconfig‎

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Original file line numberDiff line numberDiff line change
@@ -849,6 +849,15 @@ config HARDEN_BRANCH_PREDICTOR
849849

850850
If unsure, say Y.
851851

852+
config ARM64_SSBD
853+
bool "Speculative Store Bypass Disable" if EXPERT
854+
default y
855+
help
856+
This enables mitigation of the bypassing of previous stores
857+
by speculative loads.
858+
859+
If unsure, say Y.
860+
852861
menuconfig ARMV8_DEPRECATED
853862
bool "Emulate deprecated/obsolete ARMv8 instructions"
854863
depends on COMPAT

‎arch/arm64/include/asm/alternative.h‎

Lines changed: 39 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5,13 +5,17 @@
55
#include <asm/cpucaps.h>
66
#include <asm/insn.h>
77

8+
#define ARM64_CB_PATCH ARM64_NCAPS
9+
810
#ifndef __ASSEMBLY__
911

1012
#include <linux/init.h>
1113
#include <linux/types.h>
1214
#include <linux/stddef.h>
1315
#include <linux/stringify.h>
1416

17+
extern int alternatives_applied;
18+
1519
struct alt_instr {
1620
s32 orig_offset; /* offset to original instruction */
1721
s32 alt_offset; /* offset to replacement instruction */
@@ -20,12 +24,19 @@ struct alt_instr {
2024
u8 alt_len; /* size of new instruction(s), <= orig_len */
2125
};
2226

27+
typedef void (*alternative_cb_t)(struct alt_instr *alt,
28+
__le32 *origptr, __le32 *updptr, int nr_inst);
29+
2330
void __init apply_alternatives_all(void);
2431
void apply_alternatives(void *start, size_t length);
2532

26-
#define ALTINSTR_ENTRY(feature) \
33+
#define ALTINSTR_ENTRY(feature,cb) \
2734
" .word 661b - .\n" /* label */ \
35+
" .if " __stringify(cb) " == 0\n" \
2836
" .word 663f - .\n" /* new instruction */ \
37+
" .else\n" \
38+
" .word " __stringify(cb) "- .\n" /* callback */ \
39+
" .endif\n" \
2940
" .hword " __stringify(feature) "\n" /* feature bit */ \
3041
" .byte 662b-661b\n" /* source len */ \
3142
" .byte 664f-663f\n" /* replacement len */
@@ -43,27 +54,36 @@ void apply_alternatives(void *start, size_t length);
4354
* but most assemblers die if insn1 or insn2 have a .inst. This should
4455
* be fixed in a binutils release posterior to 2.25.51.0.2 (anything
4556
* containing commit 4e4d08cf7399b606 or c1baaddf8861).
57+
*
58+
* Alternatives with callbacks do not generate replacement instructions.
4659
*/
47-
#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled) \
60+
#define __ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg_enabled, cb) \
4861
".if "__stringify(cfg_enabled)" == 1\n" \
4962
"661:\n\t" \
5063
oldinstr "\n" \
5164
"662:\n" \
5265
".pushsection .altinstructions,\"a\"\n" \
53-
ALTINSTR_ENTRY(feature) \
66+
ALTINSTR_ENTRY(feature,cb) \
5467
".popsection\n" \
68+
" .if " __stringify(cb) " == 0\n" \
5569
".pushsection .altinstr_replacement, \"a\"\n" \
5670
"663:\n\t" \
5771
newinstr "\n" \
5872
"664:\n\t" \
5973
".popsection\n\t" \
6074
".org . - (664b-663b) + (662b-661b)\n\t" \
6175
".org . - (662b-661b) + (664b-663b)\n" \
76+
".else\n\t" \
77+
"663:\n\t" \
78+
"664:\n\t" \
79+
".endif\n" \
6280
".endif\n"
6381

6482
#define _ALTERNATIVE_CFG(oldinstr, newinstr, feature, cfg, ...) \
65-
__ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg))
83+
__ALTERNATIVE_CFG(oldinstr, newinstr, feature, IS_ENABLED(cfg), 0)
6684

85+
#define ALTERNATIVE_CB(oldinstr, cb) \
86+
__ALTERNATIVE_CFG(oldinstr, "NOT_AN_INSTRUCTION", ARM64_CB_PATCH, 1, cb)
6787
#else
6888

6989
#include <asm/assembler.h>
@@ -130,6 +150,14 @@ void apply_alternatives(void *start, size_t length);
130150
661:
131151
.endm
132152

153+
.macro alternative_cb cb
154+
.set .Lasm_alt_mode, 0
155+
.pushsection .altinstructions, "a"
156+
altinstruction_entry 661f, \cb, ARM64_CB_PATCH, 662f-661f, 0
157+
.popsection
158+
661:
159+
.endm
160+
133161
/*
134162
* Provide the other half of the alternative code sequence.
135163
*/
@@ -155,6 +183,13 @@ void apply_alternatives(void *start, size_t length);
155183
.org . - (662b-661b) + (664b-663b)
156184
.endm
157185

186+
/*
187+
* Callback-based alternative epilogue
188+
*/
189+
.macro alternative_cb_end
190+
662:
191+
.endm
192+
158193
/*
159194
* Provides a trivial alternative or default sequence consisting solely
160195
* of NOPs. The number of NOPs is chosen automatically to match the

‎arch/arm64/include/asm/assembler.h‎

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Original file line numberDiff line numberDiff line change
@@ -260,7 +260,11 @@ lr .req x30 // link register
260260
#else
261261
adr_l \dst, \sym
262262
#endif
263+
alternative_if_not ARM64_HAS_VIRT_HOST_EXTN
263264
mrs \tmp, tpidr_el1
265+
alternative_else
266+
mrs \tmp, tpidr_el2
267+
alternative_endif
264268
add \dst, \dst, \tmp
265269
.endm
266270

@@ -271,7 +275,11 @@ lr .req x30 // link register
271275
*/
272276
.macro ldr_this_cpu dst, sym, tmp
273277
adr_l \dst, \sym
278+
alternative_if_not ARM64_HAS_VIRT_HOST_EXTN
274279
mrs \tmp, tpidr_el1
280+
alternative_else
281+
mrs \tmp, tpidr_el2
282+
alternative_endif
275283
ldr \dst, [\dst, \tmp]
276284
.endm
277285

‎arch/arm64/include/asm/cpucaps.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,8 @@
4343
#define ARM64_UNMAP_KERNEL_AT_EL0 23
4444
#define ARM64_HARDEN_BRANCH_PREDICTOR 24
4545
#define ARM64_HARDEN_BP_POST_GUEST_EXIT 25
46+
#define ARM64_SSBD 26
4647

47-
#define ARM64_NCAPS 26
48+
#define ARM64_NCAPS 27
4849

4950
#endif /* __ASM_CPUCAPS_H */

‎arch/arm64/include/asm/cpufeature.h‎

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@@ -262,6 +262,28 @@ static inline bool system_uses_ttbr0_pan(void)
262262
!cpus_have_const_cap(ARM64_HAS_PAN);
263263
}
264264

265+
#define ARM64_SSBD_UNKNOWN -1
266+
#define ARM64_SSBD_FORCE_DISABLE 0
267+
#define ARM64_SSBD_KERNEL 1
268+
#define ARM64_SSBD_FORCE_ENABLE 2
269+
#define ARM64_SSBD_MITIGATED 3
270+
271+
static inline int arm64_get_ssbd_state(void)
272+
{
273+
#ifdef CONFIG_ARM64_SSBD
274+
extern int ssbd_state;
275+
return ssbd_state;
276+
#else
277+
return ARM64_SSBD_UNKNOWN;
278+
#endif
279+
}
280+
281+
#ifdef CONFIG_ARM64_SSBD
282+
void arm64_set_ssbd_mitigation(bool state);
283+
#else
284+
static inline void arm64_set_ssbd_mitigation(bool state) {}
285+
#endif
286+
265287
#endif /* __ASSEMBLY__ */
266288

267289
#endif

‎arch/arm64/include/asm/kvm_asm.h‎

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Original file line numberDiff line numberDiff line change
@@ -33,6 +33,10 @@
3333
#define KVM_ARM64_DEBUG_DIRTY_SHIFT 0
3434
#define KVM_ARM64_DEBUG_DIRTY (1 << KVM_ARM64_DEBUG_DIRTY_SHIFT)
3535

36+
#define VCPU_WORKAROUND_2_FLAG_SHIFT 0
37+
#define VCPU_WORKAROUND_2_FLAG (_AC(1, UL) << VCPU_WORKAROUND_2_FLAG_SHIFT)
38+
39+
/* Translate a kernel address of @sym into its equivalent linear mapping */
3640
#define kvm_ksym_ref(sym) \
3741
({ \
3842
void *val = &sym; \
@@ -68,6 +72,43 @@ extern u32 __init_stage2_translation(void);
6872

6973
extern void __qcom_hyp_sanitize_btac_predictors(void);
7074

75+
/* Home-grown __this_cpu_{ptr,read} variants that always work at HYP */
76+
#define __hyp_this_cpu_ptr(sym) \
77+
({ \
78+
void *__ptr = hyp_symbol_addr(sym); \
79+
__ptr += read_sysreg(tpidr_el2); \
80+
(typeof(&sym))__ptr; \
81+
})
82+
83+
#define __hyp_this_cpu_read(sym) \
84+
({ \
85+
*__hyp_this_cpu_ptr(sym); \
86+
})
87+
88+
#else /* __ASSEMBLY__ */
89+
90+
.macro hyp_adr_this_cpu reg, sym, tmp
91+
adr_l \reg, \sym
92+
mrs \tmp, tpidr_el2
93+
add \reg, \reg, \tmp
94+
.endm
95+
96+
.macro hyp_ldr_this_cpu reg, sym, tmp
97+
adr_l \reg, \sym
98+
mrs \tmp, tpidr_el2
99+
ldr \reg, [\reg, \tmp]
100+
.endm
101+
102+
.macro get_host_ctxt reg, tmp
103+
hyp_adr_this_cpu \reg, kvm_host_cpu_state, \tmp
104+
.endm
105+
106+
.macro get_vcpu_ptr vcpu, ctxt
107+
get_host_ctxt \ctxt, \vcpu
108+
ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
109+
kern_hyp_va \vcpu
110+
.endm
111+
71112
#endif
72113

73114
#endif /* __ARM_KVM_ASM_H__ */

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