Posted on February 15, 2010, 12:03 pm, by Alexander Sandler, under
Blog.
Few days ago I’ve written a post explaining how to do a direct I/O in Python. But then I thought that it might be a good idea to explain what direct I/O is. So, here we go. As surprising as it is, when you write some information to the disk, it doesn’t get there immediately. […]
Table of contents Introduction The obvious Memory leaks Hibernation The less obvious I/O cache Bottom line IntroductionBACK TO TOC This short article deals with simple question. How exactly lack of swap partition affects Linux’s performance. What would happen if you turn the swap off? The obviousBACK TO TOC Memory leaksBACK TO TOC The obvious price […]
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cache,
hibernate,
io,
kernel,
leaks,
linux,
memory,
partition,
performance,
RAM,
speed,
swap,
virtual memory 34 Comments |
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Posted on June 3, 2008, 6:28 pm, by Alexander Sandler, under
News.
This concludes a long research that I’ve made. I wanted to know if unaligned memory access is really that bad, or not a big deal. Eventually I made some quiet interesting discoveries. Read on.
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aligned,
cache,
ddr,
ddr2,
l1,
l2,
l3,
memory,
memory access,
misaligned,
nvram,
performance,
protocol,
RAM,
sdram,
speed,
unaligned No Comments |
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Table of contents Introduction The obvious Memory leaks Hibernation The less obvious I/O cache Bottom line Introduction The theory Measurements Implementation Meet the hardware Implementation details The code The results Conclusions Postscript IntroductionBACK TO TOC So many times I’ve heart people mentioning aligned memory access. I even protected memory alignment considerations when argued over some […]
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CPU,
ddr,
ddr2,
Intel,
l1,
l2,
l3,
memory,
misaligned,
nv,
performance,
Processor,
protocol,
RAM,
sdram,
speed,
unaligned 29 Comments |
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Introduction Hardware interrupts has always been expensive. Somehow these small pieces of software consume so much CPU power and hardware and software engineers has always been trying to change this state of affairs. Some significant progress has been made. Still hardware interrupts consume lots of CPU power. You will rarely see effects of interrupt handling […]
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affinity,
apic,
cache,
code,
CPU,
interrupt,
irq,
kernel,
linux,
memory,
napi,
packets,
performance,
smp 71 Comments |
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